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2019-06-11imx: Extend PCL063 support for phyCORE-i.MX6ULL SOMParthiban Nallathambi
Extend PHYTEC phyBOARD-i.MX6UL for phyCORE-i.MX6UL SoM (PCL063) with eMMC on SoM. CPU: Freescale i.MX6ULL rev1.0 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 38C Reset cause: POR Model: Phytec phyBOARD-i.MX6ULL-Segin SBC Board: PHYTEC phyCORE-i.MX6ULL DRAM: 256 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2C - MMC/SD - eMMC - UART (1 & 5) - USB (host & otg) Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11board: toradex: add apalis imx8qm 4gb wb it v1.0b module supportMarcel Ziswiler
This commit adds initial support for the Toradex Apalis iMX8QM 4GB WB IT V1.0B module. Unlike the V1.0A early access samples exclusively booting from SD card, they are now strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports either booting from the on-module eMMC or may be used for recovery purpose using the universal update utility (uuu) aka mfgtools 3.0. Functionality wise the following is known to be working: - eMMC, 8-bit and 4-bit MMC/SD card slots - Gigabit Ethernet - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QM as of yet. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11arm: dts: imx8qm: add support for i2c0, i2c1, i2c2, i2c3 and i2c4Marcel Ziswiler
Add support for i2c0, i2c1, i2c2, i2c3 and i2c4. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11arm: dts: imx8qm: add lpuart1, lpuart2, lpuart3, lpuart4Marcel Ziswiler
Add support for lpuart1, lpuart2, lpuart3 and lpuart4. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-06-11ARM: imx: novena: Convert block devices to DMMarek Vasut
Enable DM block, DM MMC and DM SATA support on iMX6Q Novena convert board code to match the DM support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org>
2019-06-11ARM: dts: imx: novena: Import Novena DT from LinuxMarek Vasut
Import iMX6Q Novena device tree from Linux 5.1-rc7 37624b58542f . Enable DT control in full U-Boot . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org>
2019-06-11ARM: dts: imx: dh-imx6: Fix SPI CS polarity on DHCOM iMX6 PDK2Marek Vasut
The SPI nCS signal is active low, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
2019-06-11ARM: dts: imx: dh-imx6: Import DHCOM iMX6 PDK2 DTs from LinuxMarek Vasut
Import DHCOM iMX6 PDK2 device tree from Linux 5.1.1 b724e9356404 . Enable DT control in full U-Boot . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Stefano Babic <sbabic@denx.de>
2019-06-11colibri-imx6ull: fix usb host modeMarcel Ziswiler
This fixes an issue with USB host mode. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-11colibri_imx7: migrate usb to driver modelIgor Opaniuk
Migrate USB to Driver Model (CONFIG_DM_USB=y). Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-11apalis_imx6: add device tree to makefileMarcel Ziswiler
Add device tree to Makefile to avoid newly introduced error: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument make[1]: *** [dts/Makefile:28: arch/arm/dts/imx6-apalis.dtb] Error 1 make: *** [Makefile:1009: dts/dt.dtb] Error 2 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-11ARM: dts: i.MX6ULL: U-Boot specific dts for u-boot, dm-splParthiban Nallathambi
u-boot,dm-spl property is specific to U-Boot, so created one for i.MX6ULL platforms. Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-06-11board: toradex: add colibri imx8qxp 2gb wb it v1.0b module supportMarcel Ziswiler
This commit adds initial support for the Toradex Colibri iMX8QXP 2GB WB IT V1.0B module. Unlike the V1.0A early access samples exclusively booting from SD card, they are now strapped to boot from eFuses which are factory fused to properly boot from their on-module eMMC. U-Boot supports either booting from the on-module eMMC or may be used for recovery purpose using the universal update utility (uuu) aka mfgtools 3.0. Functionality wise the following is known to be working: - eMMC and MMC/SD card - Ethernet - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QXP as of yet. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-10Merge tag 'video-updates-for-2019.07-rc3' of git://git.denx.de/u-boot-videoTom Rini
- mxsfb DM_VIDEO conversion - splash fix for DM_VIDEO configurations - meson HDMI fix for boards without hdmi-supply regulator
2019-06-08Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini
The bulk of these changes are an effort to unify Tegra186 builds with builds of prior 64-bit Tegra generations. On top of that there are various improvements that allow data (such as the MAC address and boot arguments) to be passed through from early firmware to the kernel on boot.
2019-06-06ARM: dts: stm32: Add Ethernet support on stm32mp1Christophe Roullier
This patch add Ethernet support on stm32mp157 eval board Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
2019-06-06ARM: dts: stm32mp: Add iwdg2 support for stm32mp157cPatrice Chotard
This patch adds independent watchdog support for stm32mp157c in SPL. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-06-06stm32mp1: activate NAND and NOR support on EV1Patrick Delaunay
Add the necessary configuration to have NAND and NOR support on ev1 board for BASIC boot (with SPL) or for TRUSTED boot (with TF-A). STM32MP> nand info Device 0: nand0, sector size 256 KiB Page size 4096 b OOB size 224 b Erase size 262144 b subpagesize 4096 b options 0x00184200 bbt options 0x00060000 STM32MP> sf probe SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, total 64 MiB Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-06-06board: stm32mp1: Add Avenger96 board supportManivannan Sadhasivam
Add support for Avenger96 board from Arrow Electronics based on STM32MP157 MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards family and has the following features: SoC: STM32MP157AAC PMIC: STPMIC1A RAM: 1024 Mbyte @ 533MHz Storage: eMMC v4.51: 8 Gbyte microSD Socket: UHS-1 v3.01 Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac Bluetooth®v4.2 (BR/EDR/BLE) USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4 LED: 4x User LED, 1x WiFi LED, 1x BT LED More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06arm: dts: stm32mp157: Add missing pinctrl definitionsManivannan Sadhasivam
Add missing pinctrl definitions for STM32MP157. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-05ARM: tegra: Mark built-in Ethernet as default on Jetson TX2Thierry Reding
Add an "ethernet" alias that points to the default network interface, which is the built-in EQoS on Jetson TX2. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-06-05ARM: tegra: Rename pcie-controller to pcieThierry Reding
Recent versions of DTC have checks for PCI host bridge device tree nodes that are named something other than "pci" or "pcie". Fix all occurrences of such nodes for Tegra boards to avoid potential warnings from DTC. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-06-05ARM: DTS: imx6q-logicpd: Resync with Linux 5.1Adam Ford
Resync imx6q-logicpd with Kernel 5.1.5 Signed-off-by: Adam Ford <aford173@gmail.com>
2019-06-04ARM: dts: colibri_imx7: Add lcdif nodeIgor Opaniuk
Extend lcdif DT node with proper display-timings for mxsfb driver. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-06-04arm: mvebu: helios4: add MMC to SPL DTDennis Gilmore
This allows SPL to load the main U-Boot image from MMC once DM_MMC is enabled. Signed-off-by: Dennis Gilmore <dennis@ausil.us> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-31Merge tag 'rockchip-for-v2019.07-rc3' of git://git.denx.de/u-boot-rockchipTom Rini
- some fix for rk3399-puma; - rockchip script make_fit_atf.py cleanup - Enable TPL for rk3399 orangepi and nanopi4; - add support for rk3399 boards: Nanopi NEO4, Rockpro64, Rock PI 4;
2019-05-31ARM: dts: Add missing DT for Meson G12A supportNeil Armstrong
The following DT nodes in the process on review for Linux 5.3, until Linux 5.3 is tagged, add the missing DT nodes in u-boot specific DTSI files that will be dropped when the v5.3-rc1 DT is synced again. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-31ARM: dts: sync Amlogic G12A DT with Linux 5.2-rc1Neil Armstrong
Sync from Linux commit a188339ca5a3 ("Linux 5.2-rc1") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-05-30rockchip: rk3399: Add Rock PI 4 supportJagan Teki
Add initial support for Rock PI 4 board. Specification - Rockchip RK3399 - LPDDR4 - eMMC - SD card slot - RTL8211E 1Gbps - HDMI In/Out, DP, MIPI DSI/CSI - PCIe M.2 - USB 2.0, USB-3.0 - USB C Type Commit details of rk3399-rock-pi-4.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: add ROCK Pi 4 DTS support" (sha1: 1b5715c602fda7b812af0e190eddcce2812e5417) Signed-off-by: Akash Gajjar <akash@openedev.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-30rockchip: rk3399: Add Rockpro64 board supportJagan Teki
Add initial support for Rockpro64 board. Specification - Rockchip RK3399 - 2/4GB Dual-Channel LPDDR3 - SD card slot - eMMC socket - 128Mb SPI Flash - Gigabit ethernet - PCIe 4X slot - WiFI/BT module socket - HDMI In/Out, DP, MIPI DSI/CSI, eDP - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 12V/2A Commit details of rk3399-rockpro64.dts sync from Linux 5.1-rc2: "arm64: dts: rockchip: rockpro64 dts add usb regulator" (sha1: 6db644c79c8d45d73b56bc389aebd85fc3679beb) 'Akash' has sent an initial patch before, so I keep him as board maintainer and I'm co-maintainer based on our conversation. Signed-off-by: Akash Gajjar <akash@openedev.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-30rockchip: rk3399: Add Nanopi NEO4 board supportJagan Teki
Add initial support for Nanopi NEO4 board. Specification - Rockchip RK3399 - 1GB DDR3-1866 - SD card slot - eMMC Socket - RTL8211E 1Gbps - AP6212 WiFI/BT - HDMI In/Out, DP, MIPI CSI - USB 3.0, 2.0 - USB Type C power and data - GPIO expansion ports - DC 5V/3A Commit details of rk3399-nanopi-neo4.dts sync from Linux: "arm64: dts: rockchip: Add Nanopi NEO4 initial support" (sha1: 092470b537f19788d957aed12d835a179b606014) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-26Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- SoCFPGA PL310 cleanup + A10 fix, A10 DT cleanup, DW GPIO fix.
2019-05-24Arm: dts: socfpga: Remove invalid property from chose nodeTien Fong Chee
Finding bitstream from cff-file is no longer valid after bitstream is built into FIT image and loaded by generic firmware loader. Remove cff-file as this is legacy implementation from A10 downstream. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-23ARM: dts: stm32mp1: DDR config v1.44Patrick Delaunay
Update DDR configuration with the latest update: - PUBL_regs: DXnGCR[0]= according to ddr_width to disable Byte lane 2/3 in 16bit - fix LPDDR2/3 timing_calc to step RL/WL in relaxed timings mode - remove LPDDR3 RL3 (optional) support vs MR0[7] because MR0[7] can't be read instead always apply worse RL/WL for LPDDR3 when freq < 166MHz) - change MR3 to 48ohm drive for LPDDR2/3 - change default ZPROG[7:4] = 0x1 for LPDDR2/3 , '0' is not allowed even when ODT not used - use DQSTRN for LPDDR2/3 (it was not set in PIR) - LPDDR3: set dqsge/dwsgx gate extension to 2,2 like LPDDR2 -DDRCTRL.dfitmg0: + for LPDDR3 tphy_wrlat = WL (as LPDDR2) + improvement for relaxed mode vs RL/Wl at corner case. For example @533MHz RL/WL (relaxed) = 9/5 for LPDDR2/3 and correction to MR2 accordingly - DDR_PCFGQOS1_1: port1 timeout relaxed from 0x00 to 0x40, for LTDC. - DDR_PCFGWQOS0_0: change vpr level from 11 to 12 in order to include the CPU on the variable priority queue. - DDR_SCHED: fix to consider 13 levels (13 levels - 1 = 0xC) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23stm32mp1: ram: change ddr speed to kHzPatrick Delaunay
Allow fractional support in DDR tools. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-22arm: dts: fsl-ls1028a: add sp805 watchdog nodeQiang Zhao
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22ARM: dts: Freescale: Add ecc addr for sata nodePeng Ma
Move the ecc addr from driver to dts. Signed-off-by: Peng Ma <peng.ma@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22armv8: ls1028aqds: Add support of LS1028AQDSYuantian Tang
LS1028AQDS Development System is a high-performance computing, evaluation, and development platform that supports LS1028A QorIQ Architecture processor. Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Tang yuantian <andy.tang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22armv8: ls1028ardb: Add support for LS1028ARDBYuantian Tang
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluation platform that supports the LS1028A family SoCs. This patch add basic support of the platform. Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22armv8: ls1028a: Add NXP LS1028A SoC supportYuantian Tang
Ls1028a SoC is based on Layerscape Chassis Generation 3.2 architecture with features: 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers, 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc. Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22armv8: lx2160a: add PCIe controller DT nodesHou Zhiqiang
The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-21Merge tag 'video-for-2019.07-rc3' of git://git.denx.de/u-boot-videoTom Rini
- update for using splashfile instead of location->name when loading the splash image from a FIT - updates for loading internal and external splash data from FIT - DM_GPIO/DM_VIDEO migration for mx53 cx9020 board - fix boot issue on mx6sabresd board after DM_VIDEO migration - increase the max preallocated framebuffer BPP to 32 in ipuv3 driver to prepare for configurations with higher color depth - allow to use vidconsole_put_string() in board code for text output on LCD displays
2019-05-20imx: mx6sabresd: fix boot hang with videoPeng Fan
Meet the following boot hang. " U-Boot SPL 2019.04-00661-gdc80a012e4 (Apr 25 2019 - 10:31:57 +0800) Trying to boot from MMC1 U-Boot 2019.04-00661-gdc80a012e4 (Apr 25 2019 - 10:31:57 +0800) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C)Reset cause: POR Model: Freescale i.MX6 Quad SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB Video device 'ipu@2400000' cannot allocate frame buffer memory -ensure the device is set up before relocation Error binding driver 'ipuv3_video': -28 Video device 'ipu@2800000' cannot allocate frame buffer memory -ensure the device is set up before relocation Error binding driver 'ipuv3_video': -28 Some drivers failed to bind Error binding driver 'generic_simple_bus': -28 Some drivers failed to bind initcall sequence 4ffe4500 failed at call 1780dfb7 (err=-28) " 1. fdtdec_get_alias_seq will use "video" as base, however in alias node, we use ipux, so add new alias for U-Boot dts. 2. DM_VIDEO is enabled, however reserve_video is called before relocation, so to make DM_VIDEO work before relocation, need to set SYS_MALLOC_F_LEN 3. defconfig is updated with savedefconfig Note: I do not have a video panel to test, but with this patch, U-Boot boots up again, below log. " U-Boot SPL 2019.04-00662-g0b62453bff (Apr 25 2019 - 10:36:31 +0800) Trying to boot from MMC1 U-Boot 2019.04-00662-g0b62453bff (Apr 25 2019 - 10:36:31 +0800) CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Model: Freescale i.MX6 Quad SABRE Smart Device Board Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 3 Loading Environment from MMC... *** Warning - bad CRC, using default environment PCI: pcie phy link never came up In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-05-20arm: imx: add ipu to imx53.dts and set dm-pre-relocSteffen Dirkwinkel
The ipu node in imx53 is needed for DM_VIDEO. We also need to set u-boot,dm-pre-reloc to initialize before relocation. Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2019-05-20arm: mvebu: armada-370-xp.dtsi: Add "u-boot, dm-pre-reloc" to "internal-regs"Stefan Roese
Without this U-Boot specific property, booting on Armada XP theadorable fails in SPL. All nodes in the "internal-regs" (simple-bus) DT node are not scanned, so the UART node is missing (and others). I'm not adding this property in an *u-boot.dtsi file, since there is none matching the generic rules for all files including this dtsi file. So to not miss any of the boards using this dtsi file, I'm adding it to this file directly, which makes the Linux merge a less easy unforunately. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: Chris Packham <judge.packham@gmail.com>
2019-05-18dt: bcm63158: watchdog should use a 50Mhz clockPhilippe Reynes
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-18dt: bcm6858: watchdog should use a 50Mhz clockPhilippe Reynes
The watchdog should use a clock at 50 Mhz, so instead of using the clock osc (200 Mhz), we define a reference clock at 50Mhz and use it for both watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Stefan Roese <sr@denx.de>
2019-05-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- SoCFPGA DT and reset cleanup, AE MCVEVK board support.
2019-05-15Merge tag 'u-boot-stm32-mcu-20190514' of https://github.com/pchotard/u-bootTom Rini
STM32 MCUs update: _ Add MPU region for SPI NOR memory mapped region _ Add missing QSPI flash compatible for STM32 F7 boards _ Update spi-tx-bus-width and spi-rx-bus-width properties _ Add QSPI support for STM32F469 Discovery board
2019-05-14ARM: dts: socfpga: Keep FPGA bridge entries in SPL DTMarek Vasut
Keep the FPGA bridge entries in SPL DT to let do_bridge_reset() toggle the bridges on/off as needed according to the handoff file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
generated by cgit (git 2.34.1) at 2025-01-03 23:55:02 +0000