summaryrefslogtreecommitdiff
path: root/arch/arm/dts
AgeCommit message (Collapse)Author
2020-01-07imx6: aristainetos: add device tree from linuxHeiko Schocher
Add device trees from Linux in preparation for driver model conversions. device tree files taken from Linux: 71ae5fc87c34: "Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest" and added SPDX license identifier. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-03arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config toolLokesh Vutla
Update the ddr settings to use the DDR reg config tool rev 0.2.0. This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order to avoid DSS underflow errors. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2020-01-02Merge tag 'u-boot-rockchip-20191231' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix latest mainline kernel for rk3308 - Update rk3288-evb config to suport OP-TEE - Fix for firefly-px30 DEBUG_UART channel and make it standalone - Script make_fit_atf add python3 support - Fix rk3328 timer with correct COUNTER_FREQUENCY - Fix rk3328 ATF support with enable spl-fifo-mode
2019-12-31rockchip: rk3328: enable spl-fifo-mode for emmc and sdmmcKever Yang
Since mmc to sram can't do dma, add patch to prevent aborts transfering TF-A parts. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27rockchip: px30-firefly add standalone dtsKever Yang
Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot proper will use the dts setting to do the IOMUX init, and a separate dts is needed for px30-firefly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-18sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2Diego Rondini
Orangepi Zero Plus 2 is an open-source single-board computer, available in two Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the H5 is already supported. H3 Orangepi Zero Plus 2 has: - Quad-core Cortex-A7 - 512MB DDR3 - microSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG + power supply Sync dts from linux v5.2 commit: "ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry" (sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b) Commit: "ARM: dts: sun8i: h3: Refactor the pinctrl node names" (sha1: a4dc791974e568a15f7f37131729b1a6912f4811) has been avoided as it breaks U-Boot build. Signed-off-by: Diego Rondini <diego.rondini@kynetics.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-13dts: am335x-brsmarc1/xre1: insert phy_id againHannes Schmelzer
commit 3b3e8a37d36e ("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id") did sync with recent linux kernel and replaced therefore the 'phy_id' property with a phy-handle pointing to the mdio. This is OK for linux, but introduces trouble with the already running vxWorks on this target. So this commit here re-inerts the phy_id property beside the phy-handle property to be compatible with both. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-12-09Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-netTom Rini
2019-12-09arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodesVignesh Raghavendra
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking up on J721e EVM. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09arm: dts: armada-cp110-*dtsi: add xmdio nodesNevo Hed
Based on upstream-linux See https://github.com/torvalds/linux/commit/f66b2aff. However made the XSMI register window 0x16 (22) bytes per my reading of the functional spec. Similar commits in Marvels own repo bump it to 0x200 (512) bytes but I did not see the reasoning for that. https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4. Also added device-name attributes to prevent ambiguity in the `mdio` command. Signed-off-by: Nevo Hed <nhed+github@starry.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxidGrygorii Strashko
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with internal RX delay provided by the PHY, the MAC will add an TX delay in this case. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09Merge tag 'u-boot-imx-20191209' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support
2019-12-06ARM: imx: vining2000: Repair PCIe supportMarek Vasut
Ever since the conversion to DM PCI, the board was missing the PCIe DT nodes, hence the PCI did not really work. Fill in the DT nodes and add missing PCIe device reset. Moreover, bring the PCIe power domain up before booting Linux. This is mandatory to keep old broken vendor kernels working, as they do not do so and depend on the bootloader to bring the power domain up. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06mx7ulp: Sync the device tree related filesFabio Estevam
Sync the mx7ulp device tree related files with the one from NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0). The mainline support for i.MX7ULP is very premature at this stage. We should probably re-sync with mainline Linux dts when it gets in better shape, but for now sync with the U-Boot vendor code. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CCDavid Wu
The Firefly ROC_RK3308_CC use ref_clock of input mode, and rmii pins of m1 group. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06arm: dts: Add mac node for rk3308 at dtsi levelDavid Wu
The rk3308 only support RMII mode, and if it is output clock mode, better to use ref_clk pin with drive strength 12ma. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: px5: enable spl-fifo-mode for emmc for px5-evbAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05rockchip: rk3308: enable spl-fifo-mode for emmcAndy Yan
We need load some parts of ATF to sram, but rockchip dwmmc controllers can't do dma to non-ddr addresses space, so set the mmc controller into fifo mode in spl. And show my best respect to Heiko's work for this solution. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-03ARM: MediaTek: add basic support for MT8518 boardsmingming lee
This adds a general board file based on MT8518 SoCs from MediaTek. Apart from the generic parts (cpu) we add some low level init codes and initialize the early clocks. This commit is adding the basic boot support for the MT8518 eMMC board. Signed-off-by: mingming lee <mingming.lee@mediatek.com> [trini: Migrate env location to defconfig, set ENV_IS_IN_MMC] Signeed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03pinctrl: add driver for MT8518mingming lee
Add Pinctrl driver for MediaTek MT8518 SoC. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03ARM: MediaTek: Add support for MediaTek MT8518 SoCmingming lee
Add support for MediaTek MT8518 SoC. This include the file that will initialize the SoC after boot and its device tree. Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-11-26ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1Patrick Delaunay
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1. - update slew-rate for pin configuration - update "vqmmc-supply" - remove "st,sig-dir" - add mandatory "pinctrl-names" - add "mmc-ddr-3_3v" This patch solve the eMMC detection issue for command "mmc dev 1". Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26ARM: dts: stm32: DT alignment with kernel v5.4-rc4Patrick Delaunay
Device tree and binding alignment with kernel v5.4-rc4 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26ARM: dts: stm32: DT alignment with kernel v5.3Patrick Delaunay
Device tree and binding alignment with kernel v5.3 and converted to SPDX. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-25Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-bootTom Rini
- add RPi4 upstream compatible to pinctrl - fix boot banner on RPi3/4 - add support for one binary on RPi3/4
2019-11-24arm: dts: bcm283x: Rename U-Boot fileMatthias Brugger
Rename the file bcm283x-uboot.dtsi so that it get automatically include through the scripts/Makefile.lib using $(CONFIG_SYS_SOC))-u-boot.dtsi Without this uarts and pincontroller miss the property dm-pre-reloc and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails as the pins are not set correctly. As a result the U-Boot banner isn't shown on boot. Before commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we included bcm283x-uboot.dtsi directly in the device-tree file. Which got deleted by the metioned commit. This is a much robuster solution. Reported-by: Tom Rini <trini@konsulko.com> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24fdt: fix bcm283x dm-pre-reloc definitionsMatthias Brugger
In commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we deleted the label for the node soc from bcm283x.dtsi As we don't need to add the property dm-pre-reloc to the soc node, we can delete it from bcm283x-uboot.dtsi Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-23Merge tag 'u-boot-rockchip-20191124' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Clean vid/pid in Kconfig and add fastboot for rk3399 - add 'u-boot, spl-fifo-mode' for mmc - Use FIT generator for rk3229 optee and rk3368 ATF - fan53555: add support for Silergy SYR82X and SYR83X
2019-11-23rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evbHeiko Stuebner
As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-11-22arm: socfpga: stratix10: Add alias for gmac0 in S10 dtsOoi, Joyce
Add 'ethernet0' as alias for 'gmac0' in S10 device tree. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-22arm: dts: Stratix10: change pad skew values for EMAC0 PHY driverOoi, Joyce
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA drive strength has caused CE test to fail. This requires changes on the pad skew for EMAC0 PHY driver. Based on several measurements done, Tx clock does not require the extra 0.96ns delay which was needed in Arria10. Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-20arm: dts: Stratix10: Fix memory node address and size cellsLey Foon Tan
Add #address-cells and #size-cells to memory node to fix incorrect memory size decoding in recent Uboot version. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-18Merge tag 'video-for-v2020.01-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix i.MX6ULL evk black screen observed while reboot stress tests - remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree differences between Linux and U-Boot for stm32mp1 platform
2019-11-17Merge tag 'u-boot-rockchip-20191118' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip SoC: PX30, RK3308 - Add and migrate to use common dram driver: PX30, RK3328, RK3399 - Add rk3399 board Tinker-s support - Board config update for Rock960, Rockpro64
2019-11-17rockchip: dts: tinker: Add tinker-s board supportMichael Trimarchi
Support tinker-s board. The board is equivalent of tinker board except of emmc. TODO: - support of usb current burst when the board is powered from pc Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: tinker: Move u-boot dmc initialization to specific sectionMichael Trimarchi
dmc is used to initialize the memory controller. It's needed by u-boot. Move it in the specific section Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3308: Add dts for ROC-RK3308-CCAndy Yan
Add dts file for ROC-RK3308-CC from firefly. Sync form linux rockchip for v5.5-armsoc/dts64: "arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc" (sha1: 4403e1237be3af0977aa23ef399e3496316317a0) Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rockchip: Add dts for rk3308 evbAndy Yan
Add dts for rk3308 evb, sync from the linux kernel upstream list [0]. [0]https://patchwork.kernel.org/patch/11201555/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: orangepi: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: khadas-edge: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock-pi4: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm64: dts: rk3399-rock960: add vdd_log and its init valueKever Yang
Add vdd_log node according to rock960 schematic V13. This patch affect two boards: - Rock960 Model A - Ficus Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-11-17rockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsiPeter Robinson
The u-boot specific pieces in the dts files should be in u-boot.dtsi not the main files, this allows easier sync with upstream. The rk3399.dtsi has a mix of both so move them all for consistency. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix with missing pmugrf) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: slightly increase center voltageSoeren Moch
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage scaling. So the regulator reset voltage of 0.9V is used on this board. Let u-boot initialize the center voltage to 0.95V as it is done for the VD_LOGIC domain. This avoids instability and occasional linux kernel Opses on this board. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: sync dts from linux kernelSoeren Moch
The most important change for u-boot is the fix for the vdd-log pwm voltage regulator to avoid overvoltage for the VD_LOGIC power domain. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-roc-pc: Sync latest dts changes from LinuxJagan Teki
Few important regulator power rails fixes are available in linux-next, so sync them same. Here is the last commit details: commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails") Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 devicetreesHeiko Stuebner
Add px30 related devicetrees synced from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17ram: rk3399: migrate to use common codeYouMin Chen
For there are some structures and functions are common for all rockchip SoCs, migrate to use the common code so that we can clean up reduandent codes. Signed-off-by: YouMin Chen <cym@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
generated by cgit (git 2.34.1) at 2024-12-24 05:09:53 +0000