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Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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used for booting (for example) from NAND using spl code.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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By default, on Armada100 SoC DCache Lnd ICache line
lengths are 32 bytes long
Signed-off-by: Lei Wen <leiwen@marvell.com>
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By default, on Pantheon SoC DCache Lnd ICache line
lengths are 32 bytes long
Signed-off-by: Lei Wen <leiwen@marvell.com>
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By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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This isn't used presumably should be a typedef if needed later.
Signed-off-by: Tom Rini <trini@ti.com>
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This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
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Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31.
This function can be useful for setting a group of pins into tied to some specific peripherals.
Reuse this function from the linux kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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The structure and PLL defines are added to
the imx-regs.h file and dropped from board
header files.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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Signed-off-by: Lei Wen <leiwen@marvell.com>
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This patch adds AM33xx emif/ddr support along with board specific
defines.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch adds basic clock definition of am33xx SoC.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch adds basic support for AM33xx which is based on ARMV7
Cortex A8 CPU.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Fix EMIF4 registers definition.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM
as they are no longer needed with the support for more than 1 PHYs in davinci
emac driver.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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We add an weak version of omap_rev_string in omap-common/spl.c
and while at it drop the omap3 version. Move the prototype over
to <asm/omap_common.h> with the other SPL functions.
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Adds an interface to use the OMAP3 DMA.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Adding the register definitions for omap3 DMA controller to cpu.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Adding the base register address of OMAP3 DMA controller.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix
the mask which previously was leaving out the intermediate state indicator bit.
While at it, introduce two #define's for that mask -- unfortunately, we can't
use a single #define as the assembly code can't include <asm/arch/hardware.h>
due to C-specfic constructs in it.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
2 files changed, 17 insertions(+), 1 deletions(-)
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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OMAP4460 has a different set of values for the ID code, so moving the
old ones to be related just with 4430.
Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to
the definition in the platform definition files.
Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.
Signed-off-by: Lei Wen <leiwen@marvell.com>
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For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the
definition in the platform definition files.
Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.
Signed-off-by: Lei Wen <leiwen@marvell.com>
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For files like the drivers/serial/serial.c, it must include the
platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the
definition in the platform definition files.
Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.
Updated cpu.h to remove build errors for gplugd board (by prafulla)
Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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For files like the drivers/serial/serial.c, it must include the platform
file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in
the platform definition files.
Include the platform definition file in the config file, so that it
would decouple the dependence for the driver files.
Signed-off-by: Lei Wen <leiwen@marvell.com>
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This patch add SPI driver support for Marvell gplugD
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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This patch provides support for SPI emulated over SSP for Marvell
Armada100 SOC.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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Fix checkpatch warning and errors in several i.MX related files.
While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c
regarding the usage of extern in a C file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
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This commit updates the mach-types based on the latest in Linus's head
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
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This adds support for changing pinmux functions of pin groups. This is done
by defining a PMUX_FUNC_... enum which can be used to select the function for
each group using pinmux_set_func(). It is also possible to enable
pullup/pulldown, and the existing tristate functionality is retained.
Also provided is a means of configuring a list of pingroups by providing a
configuration table to pinmux_config_table().
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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The pin groupings are better named PINGRP, since on Tegra2 they refer to
multiple pins.
Sorry about this, but better to get it right now when there is only a small
amount of code affected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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This adds most of the clock functions required by board and driver code:
-query and adjust peripheral clocks
-query and adjust PLLs
-reset and enable control
These functions are plumbed in as required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the
code now deals with both PLL clocks and source clocks.
This also tidied up the assert() to match the one sent upstream, and fixes
an error in the PWM id.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Warren <twarren@nvidia.com>
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This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Now that none of the core checks CONFIG_NET_MULTI, there's not much point
in boards defining it. So scrub all references to it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This pushes the ugly duplicated arch ifdef lists we maintain in various
image related files out to the arch headers themselves.
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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