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2019-04-25imx: Add variscite DART-6UL Evaluation KitParthiban Nallathambi
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-25imx: i.MX8MQ: clear ocotp error bitPeng Fan
In case ocotp error bit is set, clear it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25imx: add lowlevel init for ARM64Peng Fan
Sometimes we met SERROR, but only to catch it when Linux boots up. Let's enable catching in U-Boot to catch it ealier and ease debug. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25ARM: imx: Fix typo in select option for ZMX25Chris Packham
Correct CPU_ARM926EJS1 to CPU_ARM926EJS. Reported-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25imx: support i.MX8QM MEK boardPeng Fan
Add i.MX8QM MEK board support. Included a basic dts, enabled SPL FIT Boot log as below: U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) Normal Boot Trying to boot from MMC2_2 U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) CPU: NXP i.MX8QM RevB A53 at 142933 MHz Model: Freescale i.MX8QM MEK Board: iMX8QM MEK Build: SCFW 9330215b Boot: SD1 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: Error: ethernet@5b040000 address not set. eth-1: ethernet@5b040000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25imx8: add cpu supportPeng Fan
Add cpu type and Kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25ARM: defconfig: kp_imx53: Enable DM_USB support on HSC|DDC boardsLukasz Majewski
This commit enables the DM_USB on HSC|DDC i.MX53 based boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25ARM: Enable CONFIG_DM_MMC and CONFIG_DM_BLK on HSC and DDC boardsLukasz Majewski
This commit enables DM_MMC and DM_BLK on imx53 based HSC and DDC boards. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-25imx: sip: add call_imx_sip_ret2Peng Fan
This function will be used by i.MX8 fuse driver. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-13imx: bootaux: add dependency on vf610Marcel Ziswiler
Allow using bootaux also on VF610 aka Vybrid. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-13video: ipuv3: add DM_VIDEO supportAnatolij Gustschin
Extend the driver to build with DM_VIDEO enabled. DTS files must additionally include 'u-boot,dm-pre-reloc' property in soc and ipu nodes to enable driver binding to ipu device. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2019-03-13imx8qxp: Fix the reported CPU frequencyFabio Estevam
Currently the CPU frequency is incorrectly reported: CPU: NXP i.MX8QXP RevB A35 at 147228 MHz Fix this problem by using a direct call to the SCU firmware to retrieve the Cortex A35 CPU frequency. With this change applied the CPU frequency is displayed correctly: CPU: NXP i.MX8QXP RevB A35 at 1200 MHz Tested-by: Marcelo Macedo <marcelo.macedo@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
2019-03-13pico-imx6ul: Convert to DM MMCFabio Estevam
Select CONFIG_DM_MMC=y in order to support MMC driver model. This allows the MMC board related code to be removed. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2019-02-15imx: cpu.c: give access to reset cause in splMax Krummenacher
This makes get_imx_reset_cause() accessible in SPL, but keeps the SRSR register content intact so that U-Boot proper can evaluated the reset_cause again should this be needed. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-02-15ddr: vybrid: Add calibration code to memory controler's (DDRMC) setup codeLukasz Majewski
This patch extends the vf610 DDR memory controller code to support SW leveling. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
2019-02-15ddr: vybrid: Provide code to perform on-boot calibrationLukasz Majewski
This patch provides the code to calibrate the DDR's DQS to DQ signals (RDLVL). It is based on: VFxxx Controller Reference Manual, Rev. 0, 10/2016, page 1600 10.1.6.16.4.1 "Software Read Leveling in MC Evaluation Mode" and NXP's community thread: "Vybrid: About DDR leveling feature on DDRMC." https://community.nxp.com/thread/395323 Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-02-01spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FATTien Fong Chee
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both SPL and U-Boot. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-01-31Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-videoTom Rini
- ihs and imx driver fixes - relax EDID validation checks for 0 hsync/vsync pulse width (support some quirky displays)
2019-01-28imx: video: Fix return value issueYe Li
When framebuffer driver init is failed, we should return the err value not 0. So the video init can exit immediately. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx8: cpu: restrict checking ROM passover info for revAPeng Fan
Passover info only for revA. move get_cpu_rev out of CONFIG_CPU to avoid build failure when using get_cpu_rev in SPL. Add a CONFIG_SPL_BUILD for passover usage, no need to execute it again in normal U-Boot stage. Also if still checking passover info in normal U-Boot stage, need to make the passover code executed after arch_cpu_init_dm. So to make it easy and clean, only execute the code for SPL stage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx: Check the PL310 version for applying errataYe Li
Apply errata based on PL310 version instead of compile time. Also set Prefetch offset to 15, since it improves memcpy performance by 35%. Don't enable Incr double Linefill enable since it adversely affects memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K to 16MB sized src and dst aligned buffer. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2019-01-28imx: Fix potential lmb memory overwritten by stackYe Li
At default, u-boot reserves the memory from SP - 4KB to DRAM end for lmb in arch_lmb_reserve. So lmb won't allocate any memory from it. But we found the 4K gap for SP is not enough now, because some FDT updating operations are added in our u-boot before jumping to kernel, which needs larger stack. This causes the lmb allocated memory is overwritten by stack. Fix the issue by implementing the board_lmb_reserve to reserve from SP - 16KB to memory end for lmb. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-01-28imx: build flash.bin for i.MX8Peng Fan
Build flash.bin for i.MX8 when SPL enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx: mkimage_fit_atf: introduce BL33_BASE_ADDRPeng Fan
Introduce BL33_BASE_ADDR, then we could reuse this script for i.MX8QXP. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28spl: imx8: add spl boot devicePeng Fan
Add spl_boot_device for i.MX8, also add BOOT_DEVICE_MMC2_2 for spl_boot_mode. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28arm: imx: build mach-imx for i.MX8Peng Fan
To enable SPL for i.MX8, we could reuse code in arch/arm/mach-imx. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx8: scu: use dedicated MU for SPLPeng Fan
SPL runs in EL3 mode, except MU0_A, others are not powered on, and could not be used. However normal U-Boot use MU1_A, so we could not reuse the one in dts. And we could not replace the one in dts with MU0_A, because MU0_A is reserved in secure world. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx8qxp: add SUPPORT_SPL optionPeng Fan
Enable SUPPORT_SPL option for i.MX8QXP, then we could enable SPL. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-28mx7: Do not call lcdif_power_down() in the SPL caseFabio Estevam
Like it was done on imx6 in commit 9236269de57d ("imx: mx6: Fix implementantion reset_misc") Do not call lcdif_power_down() in the SPL case to fix the following build error: LD spl/u-boot-spl MKIMAGE u-boot.img arch/arm/mach-imx/built-in.o: In function `reset_misc': /home/fabio/ossystems/u-boot/arch/arm/mach-imx/mx7/soc.c:372: undefined reference to `lcdif_power_down' scripts/Makefile.spl:375: recipe for target 'spl/u-boot-spl' failed Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-01-28imx: Add PHYTEC phyBOARD-i.MX6UL-SeginMartyn Welch
Port for the PHYTEC phyBOARD-i.MX6UL-Segin single board computer. Based on the PHYTEC phyCORE-i.MX6UL SOM (PCL063). CPU: Freescale i.MX6UL rev1.2 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 44C Reset cause: POR Board: PHYTEC phyCORE-i.MX6UL I2C: ready DRAM: 256 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC0 Working: - Eth0 - i2C - MMC/SD - NAND - UART (1 & 5) - USB (host & otg) Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
2019-01-28imx: hab: Convert non-NULL IVT DCD pointer warning to an errorBreno Matheus Lima
The following NXP application notes and manual recommend to ensure the IVT DCD pointer is Null prior to calling HAB API authenticate_image() function: - AN12263: HABv4 RVT Guidelines and Recommendations - AN4581: Secure Boot on i.MX50, i.MX53, i.MX 6 and i.MX7 Series using HABv4 - CST docs: High Assurance Boot Version 4 Application Programming Interface Reference Manual Commit ca89df7dd46f ("imx: hab: Convert DCD non-NULL error to warning") converted DCD non-NULL error to warning due to the lack of documentation at the time of first patch submission. We have warned U-Boot users since v2018.03, and it makes sense now to follow the NXP recommendation to ensure the IVT DCD pointer is Null. DCD commands should only be present in the initial boot image loaded by the SoC ROM. Starting in HAB v4.3.7 the HAB code will generate an error if a DCD pointer is present in an image being authenticated by calling the HAB RVT API. Older versions of HAB will process and run DCD if it is present, and this could lead to an incorrect authentication boot flow. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-01-11Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2019-01-10Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGETJean-Jacques Hiblot
The SPL option for USB gadget should be named after the option for u-boot (CONFIG_USB_GADGET) Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2019-01-09imx8m: clock: Fix oscillator valuesFabio Estevam
OSC_27M_CLK should return 27MHz and OSC_32K_CLK should return 32768Hz to reflect the reality. This also keeps the values in sync with the Linux clock tree. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-01-09imx8: cpu: correct infoPeng Fan
The CPU banner printed is as following: CPU: CPU: Freescale i.MX8QXP RevB A35 at 147228 MHz 1. Drop the CPU: 2. Change vendor from Freescale to NXP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-09ARM: vf610: ddrmc: do not write CR79 by defaultStefan Agner
The current value CTLUPD_AREF(0) is the reset value of the register, so there is no need to write a value. If needed, the register can be written using board specific CR settings. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-01-09ARM: vf610: ddrmc: fix initialization completion detectionStefan Agner
The CR80 register has multiple interrupt bits, the code is supposed to check bit 8 but instead uses a logical and. In most cases this probably did not affect real operations since at that stage typically none of the other bits are set. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2019-01-09ARM: vf610: ddrmc: program Dummy DDRBYTE1/2Stefan Agner
The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter 5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed for correct operation of DDR. Assume the default DDR pin configuration which seems to work well on a Colibri VF50. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2019-01-01imx: add i.MX8MQ EVK supportPeng Fan
Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2019-01-01imx: imx8m: not build bootaux when building SPLPeng Fan
No need to build bootaux in SPL stage Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: imx8mq: build flash.binPeng Fan
Build flash.bin for i.MX8MQ, it will include signed hdmi firmware, spl, ddr firmware, fit image(bl31.bin, u-boot-nodtb.bin, dtb). Burn it to 33KB offset of SD card. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: imx8m: introduce imximage cfg filePeng Fan
imximage.cfg will be used to generate the flash.bin Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: imx8m: introduce script to generate fit imagePeng Fan
Introduce script to generate fit image for i.MX8M Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: imx8m: clock refactor dram pll partPeng Fan
Refactor dram_pll_init to accept args to configure different pll freq. Introduce dram_enable_bypass and dram_disable_bypass Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: spl: add MMC BOOT Device for i.MX8MPeng Fan
Add MMC BOOT Device for i.MX8M Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: rename mx8m,MX8M to imx8m,IMX8MPeng Fan
Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
2019-01-01arm: imx8qxp: build u-boot-dtb.cfgout before checking filesPeng Fan
Build u-boot-dtb.cfgout before checking files, otherwise u-boot-dtb.cfgout is generated at late stage and cause final image not generated. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: hab: extend hab_auth_img to calculate ivt_offsetParthiban Nallathambi
Current implementation of hab_auth_img command needs ivt_offset to authenticate the image. But ivt header is placed at the end of image date after padding. This leaves the usage of hab_auth_img command to fixed size or static offset for ivt header. New function "get_image_ivt_offset" is introduced to find the ivt offset during runtime. The case conditional check in this function is same as boot_get_kernel in common/bootm.c With this variable length image e.g. FIT image with any random size can have IVT at the end and ivt_offset option can be left optional Can be used as "hab_auth_img $loadaddr $filesize" from u-boot script Signed-off-by: Parthiban Nallathambi <pn@denx.de> Reviewed-by: Breno Lima <breno.lima@nxp.com>
2019-01-01SPL: Add HAB image authentication to FITYe Li
Introduce two board level callback functions to FIT image loading process, and a SPL_FIT_FOUND flag to differentiate FIT image or RAW image. Implement functions in imx common SPL codes to call HAB funtion to authenticate the FIT image. Generally, we have to sign multiple regions in FIT image: 1. Sign FIT FDT data (configuration) 2. Sign FIT external data (Sub-images) Because the CSF supports to sign multiple memory blocks, so that we can use one signature to cover all regions in FIT image and only authenticate once. The authentication should be done after the entire FIT image is loaded into memory including all sub-images. We use "-p" option to generate FIT image to reserve a space for FIT IVT and FIT CSF, also this help to fix the offset of the external data (u-boot-nodtb.bin, ATF, u-boot DTB). The signed FIT image layout is as below: -------------------------------------------------- | | | | | | | | | FIT | FIT | FIT | | U-BOOT | ATF | U-BOOT | | FDT | IVT | CSF | | nodtb.bin | | DTB | | | | | | | | | -------------------------------------------------- Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-01-01imx: bootaux: fix stack and pc assignment on 64-bit platformsGary Bisson
Using ulong is wrong as its size depends on the Host CPU architecture (32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit. Without this patch, the stack and PC are obviously wrong and it generates an abort when used on 64-bit processors such as the i.MX8MQ. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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