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2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-11arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. Some additions to the board configuration data has pushed us slightly over the current defined size on some HS devices, expand to 278000. Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-19arm: mach-k3: Use JTAD_ID register for device identificationLokesh Vutla
JTAG ID register is defined by IEEE 1149.1 for device identification. Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices instead of using SoC specific registers. [0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf [1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-17Merge tag 'ti-v2020.07-next' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next K3 J721E: * OSPI boot support * Support for loading remote cores in R5 SPL * PMIC ESM Support * Minor fixes for R5F and C7x remoteproc drivers K3 AM654: * Update AVS class 0 voltages. * Add I2C nodes DRA7xx/AM57xx: * Fixed Android boot on AM57xx AM33/AM43/Davinci: * switch to driver model for the net and mdio driver for baltos * Add DM/DTS support for omap video driver * Enable fastboot on am335x-evm
2020-03-16armv8: K3: j721e: Add DSP internal memory regions in MMU tableSuman Anna
The A72 U-Boot code supports early load and boot of a number of remote processors including the C66_0 and C66_1 DSPs. The current code supports only loading into the DDR regions which were already given the appropriate memory attributes. The C66 DSPs also have L1 and L2 internal memory regions that can behave as normal-memories. Add a new entry to the J721E MMU table covering these regions with the appropriate memory attributes to allow the A72 U-Boot code to support loading directly into these memory regions. Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-11arm: mach-k3: Add a separate function for printing sysfw versionLokesh Vutla
Add a separate function for printing sysfw version so that it can be called independently of k3_sysfw_loader. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-09arm: K3: sysfw-loader: Add a config_pm_pre_callback()Faiz Abbas
System firmware does not guarantee that clocks going out of the device will be stable during power management configuration. There are some DCRC errors when SPL tries to get the next stage during eMMC boot after sysfw pm configuration. Therefore add a config_pm_pre_callback() to switch off the eMMC clock before power management and restart it after it is done. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03armv7R: K3: Add support for jumping to firmwareKeerthy
MCU Domain rf50 is currently shutting down after loading the ATF. Load elf firmware and jump to firmware post loading ATF. ROM doesn't enable ATCM memory, so make sure that firmware that is being loaded doesn't use ATCM memory or override SPL. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCMKeerthy
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump to a firmware directly from SPL. Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03arm: k3: Add support for loading non linux remote coresKeerthy
Add MAIN domain R5FSS0 remoteproc support from spl. This enables loading the elf firmware in SPL and starting the remotecore. In order to start the core, there should be a file with path "/lib/firmware/j7-main-r5f0_0-fw" under filesystem of respective boot mode. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Guard start_non_linux_remote_cores under CONFIG_FS_LOADER] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-03-03ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFWLokesh Vutla
Since ROM configures OSPI controller to be in memory mapped mode in OSPI boot, R5 SPL can directly pass the memory mapped pointer to ROM. With this ROM can directly pull the SYSFW image from OSPI. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMUVignesh Raghavendra
Populate address mapping entries in A53 MMU for 4 GB of MMIO space reserved for providing MMIO access to multiple flash devices through OSPI/HBMC IPs within FSS. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-02-13armV7R: K3: am654: Activate early console functionalityAndreas Dannenberg
Activate early console functionality on AM65x devices to allow for early diagnostic messages until the main console is ready to get activated. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13arm: K3: j721e: Fix boot parameter table index memory addressAndreas Dannenberg
The boot parameter table index memory address for J721E was configured to an incorrect value which prevented the use of this definition to determine which boot parameter table is active which is needed to be able to distinguish between primary and backup boot modes. Fix this issue by updating the value to the correct one also in alignment with the J721E Technical Reference Manual (TRM). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13arm: mach-k3: Fix nomenclature on Silicon RevisionsLokesh Vutla
Data manual mentions the new silicon revisions as SR instead of PG. Use the same nomenclature inside U-Boot as well. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFUVignesh Raghavendra
Add support to download SYSFW into internal RAM via DFU in DFU boot mode. Prepare a DFU config entity entry dynamically using buffer address allocated for SYSFW and start DFU gadget to get SYSFW. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFUVignesh Raghavendra
J721e does not support USB Host MSC boot, but only supports DFU boot. Since BOOT_DEVICE_USB is often used for host boot mode and BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to BOOT_DEVICE_DFU Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20Merge tag '2020-01-20-ti-2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti K3 J721E: * DMA support. * MMC and ADMA support. * EEPROM support. * J721e High Security EVM support. * USB DT nodes K3 AM654: * Fixed boot due to pmic probe error. * USB support and DT nodes. * ADMA support DRA7xx/AM57xx: * BBAI board support * Clean up of net platform code under board/ti AM33/AM43/Davinci: * Reduce SPL size for omap3 boards. * SPL DT support for da850-lcdk * PLL divider fix for AM335x
2020-01-20arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 276000 bytes but now needs to be grown to 277000 to make room for the slightly larger SYSFW image used on J721e High-Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Disable ROM configured firewallsAndrew F. Davis
ROM configures certain firewalls based on its usage, which includes the one in front of boot peripherals. In specific case of boot peripherals, ROM does not open up the full address space corresponding to the peripherals. Like in OSPI, ROM only configures the firewall region for 32 bit address space and mark 64bit address space flash regions as in-accessible. When security-cfg is initialized by sysfw, all the non-configured firewalls are kept in bypass state using a global setting. Since ROM configured firewalls for certain peripherals, these will not be touched. So when bootloader touches any of the address space that ROM marked as in-accessible, system raises a firewall exception causing boot hang. It would have been ideal if sysfw cleans up the ROM configured boot peripheral firewalls. Given the memory overhead to store this information provided by ROM and the boot time increase in re configuring the firewalls, it is concluded to clean this up in bootloaders. So disable all the firewalls that ROM doesn't open up the full address space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Fix header comment match AM6 specific file functionAndrew F. Davis
This file used to be the common location for K3 init when AM6 was the only device, but common code was moved to common.c and this file became AM6 specific, correct this header text. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: mach-k3: security: Clean image out of cache before authenticationAndrew F. Davis
On K3 systems U-Boot runs on both an R5 and a large ARM cores (usually A53 or A72). The large ARMs are coherent with the DMA controllers and the SYSFW that perform authentication. And previously the R5 core did not enable caches. Now that R5 does enable caching we need to be sure to clean out any of the image that may still only be in cache before we read it using external DMA for authentication. Although not expected to happen, it may be possible that the data was read back into cache after the flush but before the external operation, in this case we must invalidate our stale local cached version. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: mach-k3: Warn when node to disable is not foundAndrew F. Davis
Not finding a node that we try to disable does not always need to be fatal to boot but should at least print out a warning. Return error from fdt_disable_node as it did fail to disable the node, but only warn in the case of disabling the TRNG as this will not prevent boot. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: j721e: Use EEPROM-based board detectionAndreas Dannenberg
The TI J721E EVM system on module (SOM), the common processor board, and the associated daughtercards have on-board I2C-based EEPROMs containing board config data. Use the board detection infrastructure to do the following: 1) Parse the J721E SOM EEPROM and populate items like board name, board HW and SW revision as well as board serial number into the TI common EEPROM data structure residing in SRAM scratch space 2) Check for presence of daughter card(s) by probing associated I2C addresses used for on-board EEPROMs containing daughter card-specific data. If such a card is found, parse the EEPROM data such as for additional Ethernet MAC addresses and populate those into U-Boot accordingly 3) Dynamically apply daughter card DTB overlays to the U-Boot (proper) DTB during SPL execution 4) Dynamically create an U-Boot ENV variable called name_overlays during U-Boot execution containing a list of daugherboard-specific DTB overlays based on daughercards found to be used during Kernel boot. This patch adds support for the J721E system on module boards containing the actual SoC ("J721EX-PM2-SOM", accessed via CONFIG_EEPROM_CHIP_ADDRESS), the common processor board ("J7X-BASE-CPB"), the Quad-Port Ethernet Expansion Board ("J7X-VSC8514-ETH"), the infotainment board ("J7X-INFOTAN-EXP") as well as for the gateway/Ethernet switch/industrial expansion board ("J7X-GESI-EXP"). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-17common: Move hang() to the same header as panic()Simon Glass
At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17common: Move reset_cpu() to the CPU headerSimon Glass
Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-03arm: mach-k3: Enable WA for R5F deadlockLokesh Vutla
On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07arm: mach-k3: j721e_init: Initialize avs class 0Keerthy
Initialize avs class 0 Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-11-07arm: mach-k3: am6_init: Initialize AVS class 0Keerthy
Initialize AVS class 0 so that mpu voltage rail is programmed to the AVS class 0 compensated value. Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-25armv7R: K3: j721e: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-25arm: K3: Clean and invalidate Linux Image before jumping to LinuxLokesh Vutla
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux by set/way in cleanup_before_linux(). Additionally there is a custom hook provided to clean and invalidate L3 cache. Unfortunately on K3 devices(having a coherent architecture), there is no easy way to quickly clean all the cache lines for L3. The entire address range needs to be cleaned and invalidated by Virtual Address. This can be implemented using the L3 custom hook but it take lot of time to clean the entire address range. In the interest of boot time this might not be a viable solution. The best hit is to make sure the loaded Linux image is flushed so that the entire image is written to DDR from L3. When Linux starts running with caches disabled the full image is available from DDR. Reported-by: Andrew F. Davis <afd@ti.com> Reported-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11arm: k3: Use driver_name to get ti_sci handleLokesh Vutla
Use the driver name to get ti_sci handle rather than relying on just the FIRMWARE uclass. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11arm: k3: Add support for printing CPUINFOLokesh Vutla
Add support for printing CPU info for all K3 devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11armv8: K3: j721e: Updated ddr address regions in MMU tableKedar Chitnis
The A72 U-Boot code loads and boots a number of remote processors including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various Main R5FSS Cores. In order to view the code loaded by the U-Boot by remote cores, U-Boot should configure the memory region with right memory attributes. Right now U-Boot carves out a memory region which is not sufficient for all the images to be loaded. So, increase this carve out region by 256MB. Signed-off-by: Kedar Chitnis <kedarc@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11armv8: K3: am65x: Update DDR address regions in MMU tableSuman Anna
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a single core in LockStep mode or 2 cores in Split mode) to achieve various early system functionalities. Change the memory attributes for the DDR regions used by the remote processors so that the cores can see and execute the proper code loaded by U-Boot. These regions are currently limited to 0xa0000000 to 0xa2100000 as per the DDR carveouts assigned for these R5F cores in the overall DDR memory map. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-11arm: K3: sysfw-loader: Allow loading SYSFW via Y-ModemAndreas Dannenberg
In order to allow booting TI K3 family SoCs via Y-Modem add support for loading System Firmware by tapping into the associated SPL core loader function. In this context also make sure a console is available and if not go ahead and activate the early console feature which allows bringing up an alternate full console before the main console is activated. Such an alternate console is typically setup in a way that the associated UART can be fully initialized prior to SYSFW services being available. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-10-11arm: K3: common: Allow for early console functionalityAndreas Dannenberg
Implement an early console functionality in SPL that can be used before the main console is being brought up. This helps in situations where the main console is dependent on System Firmware (SYSFW) being up and running, which is usually not the case during the very early stages of boot. Using this early console functionality will allow for an alternate serial port to be used to support things like UART-based boot and early diagnostic messages until the main console is ready to get activated. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-10-04board: ti: am654: Disable TRNG node for HS devicesAndrew F. Davis
On HS devices the access to TRNG is restricted on the non-secure ARM side, disable the node in DT to prevent firewall violations. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 269000 bytes but now needs to be grown to 276000 to make room for the signatures attached to the board configuration data on High Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-09-13arm: k3: Use get_ti_sci_handle() where ever possibleLokesh Vutla
Instead of calling uclass apis everywhere, use get_ti_sci_handle() when ever ti_sci is needed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13arm: k3: Fix getting ti_sci handleLokesh Vutla
API get_ti_sci_handle() is relying on the device-tree node name to be "dmsc" for probing the ti_sci device. But with the introduction of debug messages for dmsc, the node name changed to dmsc@44083000. Because of this ti_sci is never probed cause a boot failure. Instead of relying on device-tree node name, use the first available firmware node for probing ti_sci. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-08-12arm: K3: sysfw-loader: Do not require full printf() for version infoAndreas Dannenberg
A previous commit... commit 2a51e16bd57a ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default") ...causes the System Firmware version string during SPL boot to no longer getting printed to the console as expected. To fix this issue rework the handling of that string to only use basic printf() syntax rather than for example disabling CONFIG_USE_TINY_PRINTF on affected devices, this way maintaining most of the memory size benefit the initial patch brings when it comes to SPL. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-26board: ti: j721e: Add board support for j721e evmLokesh Vutla
Add board specific initialization for j721e evm Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv8: K3: j721e: Add custom MMU supportSuman Anna
The A72 U-Boot code loads and boots a number of remote processors including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various Main R5FSS Cores. Change the memory attributes for the DDR regions used by the remote processors so that the cores can see and execute the proper code. A separate table based on the current AM65x table is added for J721E SoCs, since the number of remote processors and their DDR usage will be different between the two SoC families. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Load SYSFW binary and config from boot mediaAndreas Dannenberg
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the J721E early initialization sequence. While at it also initialize the MCU_UART0 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Shut down R5 core after ATF startup on A72Lokesh Vutla
Populate the release_resources_for_core_shutdown() api with shutting down r5 cores so that it will by called just after jumping to ATF. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Store boot index from ROMAndreas Dannenberg
Obtain the boot index as left behind by the device boot ROM and store it in scratch pad SRAM for later use before it may get overwritten. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Unlock all applicable control MMR registersAndreas Dannenberg
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MCU and MAIN domains. We may want to go back later and limit the unlocking that's being done. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Add support for boot device detectionLokesh Vutla
J721E allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>