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2020-08-11arm: mach-k3: j7200: Detect if ROM has already loaded sysfwLokesh Vutla
Detect if sysfw is already loaded by ROM and pass this information to sysfw loader. Based on this information sysfw loader either loads the sysfw image from boot media or just receives the boot notification message form sysfw. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j7200: Add support for storing extended boot info from ROMLokesh Vutla
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. ROM passes this information on number of images that are loaded to bootloader at certain location. Add support for storing this information before it gets corrupted. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j7200: Add support for SOC detectionLokesh Vutla
The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Add support for detection J7200 SoC Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j721e: Fix unlocking control module registersLokesh Vutla
In main control mmr there is no partition 4 and partition 6 is available only on J721e. Fix the same in ctrl_mmr_unlock function Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j721e: Add detection for j721eLokesh Vutla
Add an api soc_is_j721e(), and use it to enable certain functionality that is available only on j721e. This detection is needed when DT is not available. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: sysfw-loader: Add support for rom loading sysfw imageLokesh Vutla
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. In such cases, SPL need not load sysfw from boot media, but need to receive boot notification message from sysfw. So separate out remoteproc calls for system controller from sysfw loader and just receive the boot notification if sysfw is already loaded. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: Move mmr_unlock to a common locationLokesh Vutla
mmr_unlock api is common for all k3 devices. Move it to a common location. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabledJean-Jacques Hiblot
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined And in turn tispl.bin ends up not embedding any DTB. Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-11board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is definedLokesh Vutla
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom when eeprom is not available Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2020-08-11arm: mach-k3: am6_init: Add support for USB boot modeFaiz Abbas
Add support for identifying USB host and device boot modes Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modesFaiz Abbas
U-boot only supports either USB host or device mode for a node at a time in dts. To support both host and dfu bootmodes, set "peripheral" as the default dr_mode but fixup property to "host" if host bootmode is detected. This needs to happen before the dwc3 generic layer binds the usb device to a host or device driver. Therefore, add an fdtdec_setup_board() implementation to fixup the dt based on the boot mode. Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe in both the host and device cases. This is required for accessing the interface at USB 2.0 speeds. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate ↵Faiz Abbas
config Gate mmc related system related configurations with DM_MMC to avoid build errors when MMC is not enabled Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11arm: mach-k3: sysfw-loader: Add support to load SYSFW from USBFaiz Abbas
Add support for loading system firmware from a USB mass storage device Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11armv7R: K3: am654: Use full malloc in SPL both pre and post relocFaiz Abbas
In order to be able to use things like file system drivers early on in SPL (before relocation) in a memory-constrained environment when DDR is not yet available we cannot use the simple malloc scheme which does not implement the freeing of previously allocated memory blocks. To address this issue go ahead and enable the use of the full malloc by manually initializing the required functionality inside board_init_f by creating a full malloc pool inside the pre-relocation malloc pool. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-11arm: mach-k3: Clean non-coherent lines out of L3 cacheAndrew F. Davis
When switching on or off the ARM caches some care must be taken to ensure existing cache line allocations are not left in an inconsistent state. An example of this is when cache lines are considered non-shared by and L3 controller even though the lines are shared. To prevent these and other issues all cache lines should be cleared before enabling or disabling a coherent master's cache. ARM cores and many L3 controllers provide a way to efficiently clean out all cache lines to allow for this, unfortunately there is no such easy way to do this on current K3 MSMC based systems. We could explicitly clean out every valid external address tracked by MSMC (all of DRAM), or we could attempt to identify only the set of addresses accessed by a given boot stage and flush only those specifically. This patch attempts the latter. We start with cleaning the SPL load address. More addresses can be added here later as they are identified. Note that we perform a flush operation for both the flush and invalidate operations, this is not a typo. We do this to avoid the situation that some ARM cores will promote an invalidate to a clean+invalidate, but only emit the invalidation operation externally, leading to a loss of data. Signed-off-by: Andrew F. Davis <afd@ti.com> Tested-by: Faiz Abbas <faiz_abbas@ti.com>
2020-08-03sf: Drop dm.h header file from spi_flash.hSimon Glass
This header file should not be included in other header files. Remove it and use a forward declaration instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-28Makefile: Rename ALL-y to INPUTS-ySimon Glass
When binman is in use, most of the targets built by the Makefile are inputs to binman. We then need a final rule to run binman to produce the final outputs. Rename the variable to indicate this, and add a new 'inputs' target. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-25arm: mach-k3: Use SOC driver for device identificationDave Gerlach
Make use of UCLASS_SOC to find device family and revision for print_cpuinfo. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-24Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini
This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-20arm: mach-k3: Use SOC driver for device identificationDave Gerlach
Make use of UCLASS_SOC to find device family and revision for print_cpuinfo. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-13arm: k3: use correct weak function name spl_board_prepare_for_linuxPatrick Delaunay
Replace the function spl_board_prepare_for_boot_linux by the correct name of the weak function spl_board_prepare_for_linux defined in spl.h. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-13arm: k3: Consolidate and silence k3_fit_atf.sh callJan Kiszka
Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose about what it does. Change that by wrapping the call to k3_fit_atf.sh into a cmd, also using that chance to reduce duplicate lines of makefile code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-25Merge tag 'ti-v2020.07-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Enable DM_ETH on omap3_logic board - Enable Caches in SPL for K3 platforms - Enable backup boot mode support for J721E - Update the DDR timings for AM654 EVM - Add automated tests for RX-51
2020-05-19arm: mach-k3: Enable dcache in SPLJan Kiszka
Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-19arm: mach-k3: j721e_init: Add support for backup boot modesAndreas Dannenberg
When the boot of J721E devices using the primary bootmode (configured via device pins) fails a boot using the configured backup bootmode is attempted. To take advantage of the backup boot mode feature go ahead and add support to the J721E init code to determine whether the ROM code performed the boot using the primary or backup boot mode, and if booted from the backup boot mode, decode the bootmode settings into the appropriate U-Boot mode accordingly so that the boot can proceed. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-05-18common: Drop linux/bitops.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop log.h from common headerSimon Glass
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop image.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-11arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. Some additions to the board configuration data has pushed us slightly over the current defined size on some HS devices, expand to 278000. Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-19arm: mach-k3: Use JTAD_ID register for device identificationLokesh Vutla
JTAG ID register is defined by IEEE 1149.1 for device identification. Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices instead of using SoC specific registers. [0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf [1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-17Merge tag 'ti-v2020.07-next' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next K3 J721E: * OSPI boot support * Support for loading remote cores in R5 SPL * PMIC ESM Support * Minor fixes for R5F and C7x remoteproc drivers K3 AM654: * Update AVS class 0 voltages. * Add I2C nodes DRA7xx/AM57xx: * Fixed Android boot on AM57xx AM33/AM43/Davinci: * switch to driver model for the net and mdio driver for baltos * Add DM/DTS support for omap video driver * Enable fastboot on am335x-evm
2020-03-16armv8: K3: j721e: Add DSP internal memory regions in MMU tableSuman Anna
The A72 U-Boot code supports early load and boot of a number of remote processors including the C66_0 and C66_1 DSPs. The current code supports only loading into the DDR regions which were already given the appropriate memory attributes. The C66 DSPs also have L1 and L2 internal memory regions that can behave as normal-memories. Add a new entry to the J721E MMU table covering these regions with the appropriate memory attributes to allow the A72 U-Boot code to support loading directly into these memory regions. Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-11arm: mach-k3: Add a separate function for printing sysfw versionLokesh Vutla
Add a separate function for printing sysfw version so that it can be called independently of k3_sysfw_loader. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-09arm: K3: sysfw-loader: Add a config_pm_pre_callback()Faiz Abbas
System firmware does not guarantee that clocks going out of the device will be stable during power management configuration. There are some DCRC errors when SPL tries to get the next stage during eMMC boot after sysfw pm configuration. Therefore add a config_pm_pre_callback() to switch off the eMMC clock before power management and restart it after it is done. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03armv7R: K3: Add support for jumping to firmwareKeerthy
MCU Domain rf50 is currently shutting down after loading the ATF. Load elf firmware and jump to firmware post loading ATF. ROM doesn't enable ATCM memory, so make sure that firmware that is being loaded doesn't use ATCM memory or override SPL. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCMKeerthy
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump to a firmware directly from SPL. Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03arm: k3: Add support for loading non linux remote coresKeerthy
Add MAIN domain R5FSS0 remoteproc support from spl. This enables loading the elf firmware in SPL and starting the remotecore. In order to start the core, there should be a file with path "/lib/firmware/j7-main-r5f0_0-fw" under filesystem of respective boot mode. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Guard start_non_linux_remote_cores under CONFIG_FS_LOADER] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-03-03ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFWLokesh Vutla
Since ROM configures OSPI controller to be in memory mapped mode in OSPI boot, R5 SPL can directly pass the memory mapped pointer to ROM. With this ROM can directly pull the SYSFW image from OSPI. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMUVignesh Raghavendra
Populate address mapping entries in A53 MMU for 4 GB of MMIO space reserved for providing MMIO access to multiple flash devices through OSPI/HBMC IPs within FSS. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-02-13armV7R: K3: am654: Activate early console functionalityAndreas Dannenberg
Activate early console functionality on AM65x devices to allow for early diagnostic messages until the main console is ready to get activated. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13arm: K3: j721e: Fix boot parameter table index memory addressAndreas Dannenberg
The boot parameter table index memory address for J721E was configured to an incorrect value which prevented the use of this definition to determine which boot parameter table is active which is needed to be able to distinguish between primary and backup boot modes. Fix this issue by updating the value to the correct one also in alignment with the J721E Technical Reference Manual (TRM). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13arm: mach-k3: Fix nomenclature on Silicon RevisionsLokesh Vutla
Data manual mentions the new silicon revisions as SR instead of PG. Use the same nomenclature inside U-Boot as well. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFUVignesh Raghavendra
Add support to download SYSFW into internal RAM via DFU in DFU boot mode. Prepare a DFU config entity entry dynamically using buffer address allocated for SYSFW and start DFU gadget to get SYSFW. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFUVignesh Raghavendra
J721e does not support USB Host MSC boot, but only supports DFU boot. Since BOOT_DEVICE_USB is often used for host boot mode and BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to BOOT_DEVICE_DFU Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20Merge tag '2020-01-20-ti-2020.04' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti K3 J721E: * DMA support. * MMC and ADMA support. * EEPROM support. * J721e High Security EVM support. * USB DT nodes K3 AM654: * Fixed boot due to pmic probe error. * USB support and DT nodes. * ADMA support DRA7xx/AM57xx: * BBAI board support * Clean up of net platform code under board/ti AM33/AM43/Davinci: * Reduce SPL size for omap3 boards. * SPL DT support for da850-lcdk * PLL divider fix for AM335x
2020-01-20arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 276000 bytes but now needs to be grown to 277000 to make room for the slightly larger SYSFW image used on J721e High-Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20arm: K3: Disable ROM configured firewallsAndrew F. Davis
ROM configures certain firewalls based on its usage, which includes the one in front of boot peripherals. In specific case of boot peripherals, ROM does not open up the full address space corresponding to the peripherals. Like in OSPI, ROM only configures the firewall region for 32 bit address space and mark 64bit address space flash regions as in-accessible. When security-cfg is initialized by sysfw, all the non-configured firewalls are kept in bypass state using a global setting. Since ROM configured firewalls for certain peripherals, these will not be touched. So when bootloader touches any of the address space that ROM marked as in-accessible, system raises a firewall exception causing boot hang. It would have been ideal if sysfw cleans up the ROM configured boot peripheral firewalls. Given the memory overhead to store this information provided by ROM and the boot time increase in re configuring the firewalls, it is concluded to clean this up in bootloaders. So disable all the firewalls that ROM doesn't open up the full address space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>