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path: root/arch/arm/mach-mvebu/cpu.c
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2017-11-16arm: mvebu: Add board_setup for xhci hardwareJon Nettleton
This fixes the USB 3.0 support for the a38x SOC. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: use fdt_addr_t] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
2017-09-26ARM: mvebu: add SAR frequency values for 1.8/2.0GHzChris Packham
The Armada-38x has 1.8GHz and 2.0GHz variants. Add entries for these variants to the sar_freq_tab. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-09-26ARM: mvebu: Add SoC IDs for Marvell's integrated CPUsChris Packham
These SoCs are network packet processors (switch chips) with integrated ARMv7 cores. They share a great deal of commonality with the Armada-XP CPUs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2016-12-29mmc: move some SDHCI related options to KconfigMasahiro Yamada
While I moved the options, I also renamed them so that they are all prefixed with MMC_SDHCI_. This commit was created in the following steps. [1] Rename with the following command find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g ' [2] create the Kconfig entries in drivers/mmc/Kconfig [3] Move the options by the following command tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \ MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR [4] Sort drivers/mmc/Makefile for readability Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-08-26arm: mvebu: Add support for NAND interface on A-38xChris Packham
The NAND interface on the Armada-38x series is similar to that on the Armada-XP. The key difference is that the NAND ECC clock ratio is provided via the DFX Server registers instead of the Core Clock. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
2016-04-04arm: mvebu: Don't enable d-cache on A375Stefan Roese
Armada 375 still has some problems with d-cache enabled in the ethernet driver (mvpp2). So lets keep the d-cache disabled until this is solved. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-04-04arm: mvebu: Add basic support for the Marvell Armada 375 SoCStefan Roese
This patch adds basic support for the Armada 375. Please note that currently the SerDes and DDR3 init code for the A375 is not included / enabled. This will be done in a later, follow-up patch. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14mvebu: Add rudimental MV78230 supportPhil Sutter
This adds basic support for Marvell's MV78230 SoC which belongs to the Armada XP series. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-14arm: mvebu: Make local structs static constStefan Roese
As these structs are local only and const, declare them accordingly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
2016-01-14arm: mvebu: Move SAR register defines into headerStefan Roese
This is preparation for the runtime bootmode detection in spl.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
2016-01-14arm: mvebu: Print CPU and SDRAM frequency upon startupStefan Roese
With this patch, the CPU and the DDR frequencies will get printed in the U-Boot startup messages. Resulting in such a log: U-Boot 2016.01-rc2-00188-gb8eeaec-dirty (Dec 21 2015 - 12:32:35 +0100) SoC: MV78460-B0 at 1600 MHz I2C: ready DRAM: 4 GiB (800 MHz, ECC not enabled) ... Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Don't include "netdev.h" in cpu.cStefan Roese
This is not needed any more since the switch to DM / DTS network initialization on MVEBU. Lets remove it, as it otherwise leads to compilation warning when CONFIG_NET is not enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Add support for MV78260Stefan Roese
This patch adds support for the dual core Armada XP variant, the MV78260. It has some minor differences to the 4-core MV78460, e.g. only 12 serdes lanes. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
2016-01-14arm: mvebu: Simplify code in setup_usb_phys() a bitStefan Roese
Use the clrbits() / setbits() functions instead of clrsetbits() when bit are only cleared or set. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Don't disable cache at startup on Armada XP at allStefan Roese
This patch leaces the cache configuration untouched for the AXP in the setup done by the BootROM. Resulting in the cache still being enabled at the startup of U-Boot. This leads to a slightly faster boot to the U-Boot prompt (or Linux of course). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Don't call arch_cpu_init() from SPL at allStefan Roese
This patch removes the call to arch_cpu_init() in the SPL U-Boot version. As SPL does not need all the configuration done in this function. And also does not need the reconfiguration of the internal register address to 0xf1000000. This will be done by the main U-Boot later on. This also fixes a problem with the timer not beeing initialized on AXP, as needed for the mdelay in the setup_usb_phys(). This will now only be called once in main U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Add v7_outer_cache_disable function for AXP & A38xStefan Roese
Add functionality to correctly disable the L2 cache on the Armada XP and 38x platforms. Without this, booting into Linux on ClearFog (A38x) results in a hangup without any output on the serial console at all. Even with earlyprintk enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Enable L2 cache on Armada XPStefan Roese
Until now, the L2 cache was never enabled again in U-Boot. To get even better performance (bootup time), lets enable the L2 cache in U-Boot. This code was taken from the Linux kernel. A performance gain was measured on the DB-MV784MP-GP board by testing with tftpboot and sata commands. This patch also cleans up the L2 cache related code. And makes sure that the L2 cache is only disabled once. Please note that A38x still runs with L2 cache disabled. And needs to be enabled for this SoC in a separate patch if needed or desired. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14net: mvneta: Convert to driver modelStefan Roese
Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
2015-10-21arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPLStefan Roese
When running on the AXP I sometimes noticed a strange behavior. As some characters are not echoed on the U-Boot prompt. Not disabling the lowlevel_init code, especially calling cpu_init_cp15() in the main U-Boot seems to solve this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-01arm: mvebu: Fix internal register config on A38xStefan Roese
Currently booting on A38x is broken. As the current code tries to detect the SoC family to disable the MMU for the A38x at runtime. But before the internal registers are switched to the new location (0xf100.0000), this runtime detection does not work. As all macros / defines are already assigned to the new location at 0xf100.0000. But the registers are sill mapped to the default location at 0xd000.0000. This patch now makes sure, no such runtime detection is used before the internal registers are configured to the new location. After this, the remaining cache cleanup is executed. Signed-off-by: Stefan Roese <sr@denx.de> Reported-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17pci: mvebu: Add PCIe driverAnton Schubert
This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the driver, this patch also removes the statically defined PCI MBUS windows. As they are not needed anymore, since this PCIe driver now creates the windows dynamically. Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000 PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp eval board using this Intel E1000 PCIe card in the PCIe 0 slot. This port was done in cooperation with Anton Schubert. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de>
2015-08-17arm: mvebu: Enable USB EHCI support on Armada XPStefan Roese
This patch enables the USB EHCI support for the Marvell Armada XP (AXP) SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done this already in the bin_hdr (SPL U-Boot). Without this, accessing the controller registers in U-Boot or Linux will hang the CPU. Additionally, the AXP uses a different USB EHCI base address. This patch also takes care of this by runtime SoC detection in the Marvell EHCI driver. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Cc: Marek Vasut <marex@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17arm: mvebu: Enable NAND controller on MVEBU SoC'sStefan Roese
This patch enables the NAND controller on the Armada XP/38x and provides a new function that returns the NAND controller input clock. This function will be used by the MVEBU NAND driver. As part of this patch, the multiple BIT macro definitions are moved to a common place in soc.h. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Peter Morrow <peter@senient.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17arm: mvebu: Disable MBUS error propagationStefan Roese
Accessing MBUS windows not backed-up by e.g. PCIe devices will hang the SoC. Disable MBUS error propagation back to CPU allows to read 0xffffffff instead of hanging the SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17arm: mvebu: Flush caches and disable MMU only on A38xStefan Roese
Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. So to fully release / unlock this area from cache, we need to first flush all caches, then disable the MMU and disable the L2 cache. On Armada XP this does not seem to be needed. Even worse, with this code added, I sometimes see strange input charactes loss from the console. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17arm: mvebu: Change MBUS base addresses and sizesStefan Roese
This patch changes the MBUS base addresses and sizes to use more generic names and also adds defines for the sizes. It also moves the base address to higher addresses. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23arm: mvebu: Disable MMU before changing register base addressStefan Roese
Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-10arm: mvebu: Add SATA/SCSI (AHCI) support for Armada A38xStefan Roese
This patch adds support for the common AHCI controller on the Marvell Armada 38x. Tested on the Marvell DB-88F6820-GP eval board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10arm: mvebu: Add SDIO/SDHCI support for Armada A38xStefan Roese
Armada A38x implements an SDHCI compatible SDIO controller. This patch enables the Marvell driver to support this SoC. And enables the SDIO controller if selected by the board configuration. Tested on Marvell DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-06-14arm: mvebu: Update CBAR with SOC regs baseKevin Smith
SMP-enabled Linux kernels read the CBAR register in CP15 to find the address of the SCU registers. After remapping internal registers, also update the CBAR so the kernel can find them. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Stefan Roese <sr@denx.de>
2015-06-14arm: mvebu: Disable L2 cache before enabling d-cacheStefan Roese
L2 cache may still be enabled by the BootROM. We need to first disable it before enabling d-cache support. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
2015-05-05arm: mvebu: Add d-cache invalidate before enabling the d-cacheStefan Roese
This solves some RX problems that have been seen, when using the mvneta ethernet driver. The cache needs to be reset into a "clean" state before using it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: mvebu: Change network init code to allow a more flexible setupStefan Roese
With the introduction of the Armada 38x support, its necessary to change the mvneta ethernet driver init call from always 4 times to a configurable value. Lets make this init call more flexible by moving the actually used devices to the config header. Additionally this patch takes care of the slightly different base addresses for the ethernet controllers on A38x. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-05arm: mvebu: Add basic Armada 38x supportStefan Roese
This patch adds support for the Marvell Armada 38x SoC family. Supported peripherals are: - UART - Ethernet (mvneta) - I2C - SPI (including SPI NOR flash) Tested on Marvell DB-88F6820-GP evaluation board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05arm: armada-xp: Move SoC sources to mach-mvebuStefan Roese
Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/* Since this platform will be extended to support other Marvell SoC's as well, lets rename it directly to mvebu. This will be used by the upcoming Armada 38x suport (A38x). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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