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path: root/arch/arm/mach-rmobile/cpu_info.c
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2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18common: Drop net.h from common headerSimon Glass
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-11env: Move env_set() to env.hSimon Glass
Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-09ARM: renesas: Add R8A77980 V3H platform codeMarek Vasut
Add a few bits of platform code to support R8A77980 V3H SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-07ARM: dts: renesas: Add RZ/A1 platform codeChris Brandt
Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC. Distinguishing feature of this SoC is that it has up to 10 MiB of on-SoC static RAM (SRAM). The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-07ARM: rmobile: Fix to enable icache early in Gen3Takeshi Kihara
This patch fixes the problem that u-boot will not start unless icache is enabled early. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-04ARM: rmobile: Set environment variable containing CPU typeMarek Vasut
Set environment variable 'platform' containing the CPU type. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-11-02ARM: rmobile: Generate fitting mem_map on Gen3Marek Vasut
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire 64bit DRAM space as cachable. On CortexA57, this might result in odd side effects, where the CPU tries to prefetch from those areas and if there is no DRAM backing them, CPU bus hang can happen. This patch fixes it by generating the mem_map structure based on the actual memory layout obtained from the DT, thus not marking areas without any DRAM behind them as cachable. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3") Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-01ARM: renesas: Add R8A77990 E3 SoC IDMarek Vasut
Add ID and Kconfig entry for the Renesas R8A77990 E3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-11ARM: rmobile: Fix the memory map on Gen3Marek Vasut
Fix up the memory map on Gen3 to match datasheet properly. This simplifies the memory map setup as well, since we do no longer need this massive complexity. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05ARM: rmobile: Add R8A77965 M3N IDsMarek Vasut
Add CPU and PRR IDs for R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77995 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77995 D3 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77970 V3M . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30ARM: rmobile: Unify memory map for RCar Gen3Marek Vasut
Unify the R7A7795 and R8A7796 memory maps in memmap-gen3 and, for now, select which one is used based on which SoC is selected. Since this is done in C code instead of statically assigned now, the decision can be taken by PRR SoC match as well, which will be done in a subsequent patch. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30ARM: rmobile: Add PRR CPU ID macrosMarek Vasut
Replace the ad-hoc values in the PRR CPU ID table with macros, so that users can use rmobile_get_cpu_type() can compare the returned value with these macros to figure out on which CPU they are running. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7796 into the CPU tableMarek Vasut
Add entry for the R8A7796 RCar M3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-05-22ARM: rmobile: Add R8A7795 into the CPU tableMarek Vasut
Add entry for the R8A7795 RCar H3 SoC into the CPU info table. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17arm: rmobile: Add BLANCHE board supportmasakazu.mochizuki.wd@hitachi.com
BLANCHE is development board based on R-Car V2H SoC (R8A7792) This commit supports the following periherals: - SCIF, Ethernet, QSPI, MMC Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17ARM: rmobile: Move SoC sources to mach-rmobileNobuhiro Iwamatsu
Move from arch/arm/cpu/armv7/rmobile/ to arch/arm/mach-rmobile/. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>