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path: root/arch/arm/mach-rockchip/rk3399
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2017-01-11arm64: rk3399: update rockchip_get_cru APIKever Yang
rk3399 has two clock-controller: cru and pmucru, update the rockchip_get_crui() API, and rockchip_get_clk() do not used for other module. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30rk3399: disable the clock multiplier support when SoC initKever Yang
The Clock Multiplier in rk3399 EMMC programmable clock generator is broken, we can remove its support from SoC GRF register. Without this patch, rk3399 emmc driver is not work after below patch applied: 6dffdbc mmc: sdhci: Add the programmable clock mode support Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30rockchip: rk3399: Move rockchip_get_cru() out of the driverSimon Glass
This function is called from outside the driver. It should be placed into common SoC code. Move it. Also rename the driver symbol to be more consistent with the other rockchip clock drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-09-22rk3399: syscon: add support for pmugrfKever Yang
pmugrf is a module like grf which contain some of the iomux registers and other registers. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12drivers/sysreset: group sysreset driversMax Filippov
Create drivers/sysreset and move sysreset-uclass and all sysreset drivers there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05rk3399: add basic soc driverKever Yang
This patch add driver for: - clock driver including set_rate for cpu, mmc, vop, I2C. - sysreset driver - grf syscon driver Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25ARM64: rockchip: add support for rk3399 SoC based evbKever Yang
RK3399 is a SoC from Rockchip with dual-core Cortex-A72 and quad-core Cortex-A53 CPU. It supports two USB3.0 type-C ports and two USB2.0 EHCI ports. Other interfaces are very much like RK3288, the DRAM are 32bit width address and support address from 0 to 4GB-128MB range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>