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path: root/arch/arm/mach-socfpga/include
AgeCommit message (Expand)Author
2018-07-12ddr: altera: stratix10: Add DDR support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add SPL driver for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: stratix10: Add mailbox support for Stratix10 SoCLey Foon Tan
2018-07-12arm: socfpga: misc: Move bridge command to misc commonLey Foon Tan
2018-05-20SPDX: Fixup SPDX tags in a few new filesTom Rini
2018-05-18arm: socfpga: stratix10: Add pinmux support for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoCLey Foon Tan
2018-05-18arm: socfpga: stratix10: Add watchdog and firewall base addressesLey Foon Tan
2018-05-18ARM: socfpga: Fix Documentation errors in scu_registersBen Kalo
2018-05-18ARM: socfpga: Add DDR driver for Arria 10Tien Fong Chee
2018-05-18ARM: socfpga: Rename the gen5 sdram driver to more specific nameTien Fong Chee
2018-05-18ARM: socfpga: Repair A10 EMAC reset handlingMarek Vasut
2018-05-18ARM: socfpga: Sync A10 clock manager binding parserMarek Vasut
2018-05-18ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGETMarek Vasut
2018-05-08ARM: socfpga: Add boot trampoline for Arria10Marek Vasut
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2018-04-17arm: socfpga: stratix10: Add base address map for Statix10 SoCChin Liang See
2017-11-21socfpga: boot0 hook: adjust to unified boot0 semanticsPhilipp Tomsich
2017-07-26arm: socfpga: Add FPGA driver support for Arria 10Tien Fong Chee
2017-07-26arm: socfpga: Restructure FPGA driver in the preparation to support A10Tien Fong Chee
2017-07-26arm: socfpga: Remove unused passing parameter of socfpga_bridges_resetTien Fong Chee
2017-05-18arm: socfpga: Add misc support for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add pinmux for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add sdram header file for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add system manager for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add clock driver for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add reset driver support for Arria 10Ley Foon Tan
2017-05-18arm: socfpga: Add A10 macrosLey Foon Tan
2017-05-18arm: socfpga: Restructure misc driverLey Foon Tan
2017-05-18arm: socfpga: Restructure system managerLey Foon Tan
2017-05-18arm: socfpga: Restructure reset manager driverLey Foon Tan
2017-05-18arm: socfpga: Restructure clock manager driverLey Foon Tan
2017-04-14ARM: socfpga: boot0 hook: remove macro from boot0 header fileChee, Tien Fong
2017-02-08arm: socfpga: set the mpuclk divider in the Altera group registerDinh Nguyen
2016-12-06ARM: socfpga: Add boot0 hook to prevent SPL corruptionMarek Vasut
2016-10-27ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See
2016-04-10arm: socfpga: Nuke useless includeMarek Vasut
2015-12-22arm: socfpga: Define NAND reset bitMarek Vasut
2015-12-20arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen
2015-11-30ARM: socfpga: rename the cyclone5 and arria5 base address fileDinh Nguyen
2015-11-30ARM: socfpga: arria10: add base address map for Arria10Dinh Nguyen
2015-11-30arm: socfpga: reset: FIX address of tstscratch registerPhilipp Rosenberger
2015-11-03arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit definesDinh Nguyen
2015-09-04mmc: dw_mmc: Probe the MMC from OFMarek Vasut
2015-08-23arm: socfpga: Make the pinmux table const u8Marek Vasut
2015-08-08arm: socfpga: scan: Add code to get FPGA IDDinh Nguyen
2015-08-08arm: socfpga: scan: Clean up horrible macrosMarek Vasut
2015-08-08arm: socfpga: scan: Clean up scan_chain_engine_is_idle()Marek Vasut
2015-08-08ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut