summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/tegra210
AgeCommit message (Expand)Author
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2018-01-12ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSETStephen Warren
2017-10-04treewide: replace with error() with pr_err()Masahiro Yamada
2017-07-28dm: tegra: Convert USB setup to livetreeSimon Glass
2017-01-24Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini
2016-09-27ARM: tegra: add APIs the clock uclass driver will needStephen Warren
2016-09-27ARM: tegra: add peripheral clock init tableStephen Warren
2016-03-29ARM: tegra210: set PLLE_PTS bit when enabling PLLEStephen Warren
2015-11-12ARM: tegra: note that p2371-2180 is Jetson TX1Stephen Warren
2015-11-12ARM: tegra: error check Tegra210 XUSB padctl waitsStephen Warren
2015-11-12ARM: tegra: add lane tables to Tegra210 XUSB padctlStephen Warren
2015-11-12ARM: tegra: switch Tegra210 to common XUSB padctlStephen Warren
2015-11-12ARM: tegra210: implement PLLE init procedure from TRMStephen Warren
2015-09-16ARM: tegra: clk_m is the architected timer source clockThierry Reding
2015-09-16ARM: tegra: Implement clk_mThierry Reding
2015-09-16ARM: tegra: Add p2371-2180 boardStephen Warren
2015-08-13tegra: Correct logic for reading pll_misc in clock_start_pll()Simon Glass
2015-08-06ARM: tegra: Add p2371-0000 boardStephen Warren
2015-08-06ARM: tegra: Add e2220-1170 boardStephen Warren
2015-08-05Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.Tom Warren
2015-08-05Tegra: clocks: Add 38.4MHz OSC support for T210 useTom Warren
2015-07-28T210: Add support for 64-bit T210-based P2571 boardTom Warren
2015-07-28ARM: Tegra210: Add SoC code/include files for T210Tom Warren
2015-03-30ARM: tegra: pinctrl: move Tegra210 code to the correct dirStephen Warren