Age | Commit message (Expand) | Author |
2018-05-07 | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini |
2018-01-12 | ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET | Stephen Warren |
2017-10-04 | treewide: replace with error() with pr_err() | Masahiro Yamada |
2017-07-28 | dm: tegra: Convert USB setup to livetree | Simon Glass |
2017-01-24 | Kconfig: Migrate BOARD_LATE_INIT to a select | Tom Rini |
2016-09-27 | ARM: tegra: add APIs the clock uclass driver will need | Stephen Warren |
2016-09-27 | ARM: tegra: add peripheral clock init table | Stephen Warren |
2016-03-29 | ARM: tegra210: set PLLE_PTS bit when enabling PLLE | Stephen Warren |
2015-11-12 | ARM: tegra: note that p2371-2180 is Jetson TX1 | Stephen Warren |
2015-11-12 | ARM: tegra: error check Tegra210 XUSB padctl waits | Stephen Warren |
2015-11-12 | ARM: tegra: add lane tables to Tegra210 XUSB padctl | Stephen Warren |
2015-11-12 | ARM: tegra: switch Tegra210 to common XUSB padctl | Stephen Warren |
2015-11-12 | ARM: tegra210: implement PLLE init procedure from TRM | Stephen Warren |
2015-09-16 | ARM: tegra: clk_m is the architected timer source clock | Thierry Reding |
2015-09-16 | ARM: tegra: Implement clk_m | Thierry Reding |
2015-09-16 | ARM: tegra: Add p2371-2180 board | Stephen Warren |
2015-08-13 | tegra: Correct logic for reading pll_misc in clock_start_pll() | Simon Glass |
2015-08-06 | ARM: tegra: Add p2371-0000 board | Stephen Warren |
2015-08-06 | ARM: tegra: Add e2220-1170 board | Stephen Warren |
2015-08-05 | Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. | Tom Warren |
2015-08-05 | Tegra: clocks: Add 38.4MHz OSC support for T210 use | Tom Warren |
2015-07-28 | T210: Add support for 64-bit T210-based P2571 board | Tom Warren |
2015-07-28 | ARM: Tegra210: Add SoC code/include files for T210 | Tom Warren |
2015-03-30 | ARM: tegra: pinctrl: move Tegra210 code to the correct dir | Stephen Warren |