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2018-09-11ARM: uniphier: remove ad-hoc clock enabling for EHCIMasahiro Yamada
The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-12ARM: uniphier: use FIELD_PREP for PLL settingsMasahiro Yamada
It is tedious to define both mask and bit-shift. <linux/bitfield.h> provides a convenient way to get access to register fields with a single shifted mask. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compute SSCPLL values more preciselyMasahiro Yamada
Use DIV_ROUND_CLOSEST(). To make the JK value even more precise, I used a bigger coefficient, then divide it by 512. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: fix SSCPLL init code for LD11 SoCDai Okamura
Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") missed to write the computed value to the SSCPLLCTRL2 register. Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compile pll-base-ld20.c for PXs3Masahiro Yamada
Fix the link error for the combination of CONFIG_ARCH_UNIPHIER_LD11=n CONFIG_ARCH_UNIPHIER_LD20=n CONFIG_ARCH_UNIPHIER_PXS3=y Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-23ARM: uniphier: remove CONFIG_UNIPHIER_ETHMasahiro Yamada
The option is never enabled by anyone. Remove the code surrounded by its ifdef. This should be handled by the clock/reset drivers. CONFIG_UNIPHIER_ETH in scripts/config_whitelist.txt will be dropped by the next resync. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-10-15ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIGMasahiro Yamada
Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-18ARM: uniphier: add GPU(Mali) reset deassert and clk enableMasahiro Yamada
The driver for Linux is out of control of Socionext, so set up reset / clock in here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-09-18ARM: uniphier: remove bit field macros from sc64-regs.hMasahiro Yamada
Starting from PXs3, the bit fields of RSTCTRL, CLKCTRL registers will change every SoC. There is no more point to define bitfields in the common header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30ARM: uniphier: fix DSPLL init code for LD20 SoCDai Okamura
Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30ARM: uniphier: add PLL settings for PXs3Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30ARM: uniphier: move PLLCTRL register macros to each SoC .c fileMasahiro Yamada
The new SoC PXs3 changed the address of PLL, but still uses the same PLL name. We can not define SC_*PLLCTRL in the common header. Move them to per-SoC .c file. Also, fix some PLL comments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settingsMasahiro Yamada
The #include <common.h> was added for mdelay(). Later, the declaration of mdelay was moved to <linux/delay.h> by commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). There is no need to include <common.h> now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada
This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-07-26ARM: uniphier: remove SPL support for ARMv8 SoCsMasahiro Yamada
It has been a while since ARM Trusted Firmware supported UniPhier SoC family. U-Boot SPL was intended as a temporary loader that runs in secure world. It is a maintenance headache to support two different boot mechanisms. Secure firmware is realm of ARM Trusted Firmware and now U-Boot only serves as a non-secure boot loader for UniPhier ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-25ARM: uniphier: fix various sparse warningsMasahiro Yamada
Fix warnings reported by sparse: - ... was not declared. Should it be static?" - cast to restricted __be32 While fixing those, the type conflict of cci500_init() was found. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-17ARM: uniphier: add more init code for PXs3Masahiro Yamada
Add the boot device table and reset deassertion for eMMC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-15Kconfig: USB: Migrate CONFIG_USB_EHCI to CONFIG_USB_EHCI_HCDTom Rini
In order to be able to migrate the various SoC EHCI CONFIG options we first need to finish the switch from CONFIG_USB_EHCI to CONFIG_USB_EHCI_HCD. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marex@denx.de>
2017-04-20ARM: uniphier: setup EHCI PHY paramters for LD11Masahiro Yamada
Set the same PHY parameters as the Boot ROM uses. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23ARM: uniphier: set up charge pump current for MPLL of LD11 SoCMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20Masahiro Yamada
For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device would stay in the reset state until its RST_n pin is deasserted by software. Currently, this is cared by an ad-hoc way because the eMMC hardware reset provider is not supported in U-Boot for now. This code should be re-written once the "mmc-pwrseq-emmc" binding is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-23ARM: uniphier: rework spl_boot_device() and related codeMasahiro Yamada
The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22ARM: uniphier: add PXs3 SoC supportMasahiro Yamada
Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22ARM: uniphier: replace <common.h> with <linux/delay.h> where possibleMasahiro Yamada
The <common.h> includes too many headers. Actually, these files needed to include it for udelay() declaration. Now we can replace it with <linux/delay.h> thanks to commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22ARM: uniphier: replace <linux/err.h> with <linux/errno.h>Masahiro Yamada
These files only need error number macros. Actually, IS_ERR(), PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid unnecessary header includes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-18ARM: uniphier: refactor spl_init_board()Masahiro Yamada
Merge init-*.c into a single file using a table of callbacks because the initialization flow is almost common among SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-18ARM: uniphier: refactor board_init()Masahiro Yamada
The code here is cluttered due to the switch statement. Introduce a table of callbacks to clean up the initialization code across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-17ARM: uniphier: split out UMC clock enableMasahiro Yamada
The clock enable bits for UMC are more SoC-specific than for the other hardware blocks. Separate the UMC clocks and the other clocks for better code reuse across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-17ARM: uniphier: remove unneeded argument of uniphier_ld20_pll_init()Masahiro Yamada
At first, we thought the LD20 PLL setting would be board dependent, but this argument turned out unneeded after all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3Masahiro Yamada
The USB boot without the stand-by MPU is available on ES3 or later of LD11 SoC, but the code in this if-conditional block must not be run when booting from USB. Check if the boot device is USB, and skip the code in the case. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabledMasahiro Yamada
At the moment, the clk driver is not clever enough to automatically enable parent clocks like Linux. Enable the STDMAC clock explicitly if USB is enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29ARM: uniphier: enable SSC for more PLLs for LD20 SoCMasahiro Yamada
For Electro-Magnetic Compatibility. Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-29ARM: uniphier: remove unneeded mdelay() in PLL setting functionMasahiro Yamada
This delay is already cared by the callers of this function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-18ARM: uniphier: remove unnecessary EHCI reset deassertionMasahiro Yamada
It is now deasserted by the reset controller driver. Drop the ad-hoc code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-10-10ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoCMasahiro Yamada
For Electro-Magnetic Compatibility test. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-23ARM: uniphier: add PLL init code for LD11 SoCMasahiro Yamada
- Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: add PLL init code for LD20 SoCMasahiro Yamada
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: collect clock/PLL init code into a single directoryMasahiro Yamada
Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19ARM: uniphier: move PLL init code to U-Boot proper where possibleMasahiro Yamada
The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24ARM: uniphier: add clock/reset settings for xHCI of ProXstream2Masahiro Yamada
Deassert resets and enable clock signals of xHCI blocks if the corresponding CONFIG is enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-05-26ARM: uniphier: add PH1-LD11 SoC supportMasahiro Yamada
This is a low-cost ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-24ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01cosmetic: Fix typos "privide"Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01ARM: uniphier: rename function names ph1_* to uniphier_*Masahiro Yamada
Eliminate the "ph1"_ prefixes from function names because "uniphier_" describes the SoC familiy better. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: drop PH1- prefix from CONFIG options and file namesMasahiro Yamada
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: switch over to generic EHCI driverMasahiro Yamada
The UniPhier EHCI driver (drivers/usb/host/ehci-uniphier.c) does nothing special but set the base address and handle reset/clock. Since commit 4feefdcfe916 ("usb: add clock support for generic EHCI"), the generic one (drivers/usb/host/ehci-generic.c) can do those, too. We no longer need to stick to the dedicated driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: move headers out of include/mach directoryMasahiro Yamada
These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-11-10Various Makefiles: Add SPDX-License-Identifier tagsTom Rini
After consulting with some of the SPDX team, the conclusion is that Makefiles are worth adding SPDX-License-Identifier tags too, and most of ours have one. This adds tags to ones that lack them and converts a few that had full (or in one case, very partial) license blobs into the equivalent tag. Cc: Kate Stewart <kstewart@linuxfoundation.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2015-09-25ARM: uniphier: add ProXstream2 and PH1-LD6b supportMasahiro Yamada
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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