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2016-02-20Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2016-02-19ARM: Add Support for the VInCo platformGregory CLEMENT
The Versatile Industrial Communication platform is a community oriented board from Landis + Gyr. It comes with: - an RS-485 port - 2 Ethernet ports - a wireless M-BUS - a 4G modem - a 4MB SPI flash - a 4GB eMMC Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> [rebase on current TOT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: sama5d2: configure the L2 cache memorySamuel Mescoff
The SAMA5D2 has a second internal SRAM that can be reassigned as a L2 cache memory. Make sure it is configured as a L2 cache memory when booting from a SPL image. Based on the commit b5ea95ef2b5b from the at91bootstrap repository. Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr> Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18arm: at91: Add support for DENX MA5D4 SoM and EVKMarek Vasut
Add support for DENX MA5D4 SoM and MA5D4EVK board, based on the Atmel SAMA5D4 SoC. The SoM contains the SoC, eMMC, SPI NOR, SPI CAN controllers and DRAM, the baseboard contains UART connectors, ethernet port, microSD slot, LCD header, 2x CAN connector and a lot of expansion headers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clean up the PMC_PLLICPR init codeWenyou Yang
Due to introducing the PMC_PLLICPR init function, use this function to clean up the code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add PMC_PLLICPR init functionWenyou Yang
To avoid the duplicated code, add the PMC_PLLICPR init function. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add PLLB enable/disable functionsWenyou Yang
To avoid the duplicated code, add the PLLB handle functions. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Heiko Schocher <hs@denx.de> [add enable/disable functions to arm920t] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: armv7: clean up UTMI PLL handle codeWenyou Yang
Due to introducing the UTMI PLL enable function, use this function to reduce the duplicated code. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add UTMI PLL enable/disable functionWenyou Yang
To avoid the duplicated code, add the UTMI PLL handle functions, and add PMC_USB init function too. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: cpu: at91: clean up peripheral clock codeWenyou Yang
Due to introducing the new peripheral clock handle functions, use these functions to clean up the duplicated code. Meanwhile, remove unneeded header file include, at91_pmc.h. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixup for arm920t code] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: clock: add a new file to handle clockWenyou Yang
To reduce the duplicated code, add a new file to accommodate the peripheral's and system's clock handle code, shared with the SoCs with different ARM core. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: at91: asm/at91_pmc.h: fix trival register offsetWenyou Yang
Remove unnecessary #ifdef CPU_HAS_PCR. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-02-18ARM: tegra: enable USB device mode port on DalmoreStephen Warren
This allows U-Boot to expose UMS and DFU protocols on this port in device mode, or to act as a USB host on the port, using an "OTG" (micro-B to female A host) cable. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-17video: tegra: Correct a Kconfig warning with VIDCONSOLE_AS_LCDSimon Glass
This new feature causes a Kconfig warning on boards without a display enabled. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Clean up the old LCD/PWM driver codeSimon Glass
Remove the old PWM code. Remove calls to CONFIG_LCD functions now that we are using driver model for video. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Move LCD driver to use the DM PWM driverSimon Glass
Use the driver-model PWM driver in preference to the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Move LCD enums into the driverSimon Glass
There is no need to have these in a separate file as they are not referenced from anywhere else. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Convert tegra20 LCD driver to driver modelSimon Glass
Move this driver over to use driver model. This involves rearranging the code somewhat. The effect is that everything is run from the probe() method. Boards which use this are fixed up, but only seaboard is tested. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Merge the two config structures togetherSimon Glass
We have a structure for the display panel and another for the controller. There is some overlap between them. Merge them to simplify the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Merge the display driver into one fileSimon Glass
At present we have code in arch/arm and code in drivers/video. Move it all into drivers/video since it is a display driver and our current approach is to put all driver code in drivers/. Make a few functions static now that they are not used outside the file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: dts: Sync tegra20.dtsi with Linux v4.4Simon Glass
This file has changed quite a bit since it was set up. Sync it back with Linux v4.4. Adjust the users slightly to cope with the changes: - the host1x node is now called host1x@50000000 - we need a clocks node to provide the clk32k_in phandle - active usb nodes need status = "okay" - active i2c nodes need status = "okay" Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20Simon Glass
This option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124. Also move this option to Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: Allow CONFIG_DM_VIDEO to be used as well as CONFIG_LCDSimon Glass
While we transition to using driver model for video, we need to support both options. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: Allow driver model to be used for the PWMSimon Glass
We can skip this manual init when using driver model for the PWM. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: lcd: Merge tegra124-lcd.c into display.cSimon Glass
There isn't a lot of benefit of have two separate files. With driver model the code needs to be in the same driver, so it's better to have it in the same file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: pwm: Add a driver for the tegra PWMSimon Glass
This PWM supports four channels. The driver always uses the 32KHz clock, and adjusts the duty cycle accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: dts: Sync up nyan-big files with LinuxSimon Glass
Sync up these files with Linux v4.4. Some differences remain, principally that the addresses are still 32-bit in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-16tegra: dts: Sync up the tegra124 device tree files with LinuxSimon Glass
Sync up these files with Linux v4.4. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-02-15arm: build some file(s) as ARM mode onlyDavid Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-15arm: the ARM920T is THUMB capable, so select the appropriate ISADavid Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-15arm: make sure board_init_r() is being called using the right mode (ARM / THUMB)David Müller (ELSOFT AG)
Signed-off-by: David Müller <d.mueller@elsoft.ch>
2016-02-14Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2016-02-14ARM: uniphier: add support for PH1-Pro4 Ace and Sanji boardsMasahiro Yamada
Initial commit for PH1-Pro4 Ace and Sanji boards. Note: There are two variants for the Ace board in terms of the amount of DDR memory; 1GB or 2GB. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil boardMasahiro Yamada
This is used for on-board inter-connection. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil boardMasahiro Yamada
This board has an EEPROM connected to the I2C channel 0 of the SoC. Its slave address is 0x54. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: adjust DDR clock delay line for ProXstream2Masahiro Yamada
It turned out that DDR channel 2 was not working on ProXstream2 Vodka board. Add the missing ACBLDR0 register setting to adjust the delay between the clock lines and the address/command lines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: move cmd_ddrmphy.c to fix build errorMasahiro Yamada
If CONFIG_CMD_DDRMPHY_DUMP is enabled, the build fails. Fixes: 93d92d46cd01 ("ARM: uniphier: add dump command for DDR Multi PHY registers") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: fix makefiles to build cmd_ddr(m)phy.cMasahiro Yamada
The U-Boot proper building needs to descend arch/arm/mach-uniphier/dram to build these commands. Fixes: 93d92d46cd01 ("ARM: uniphier: add dump command for DDR Multi PHY registers") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: remove unused header mio-regs.hMasahiro Yamada
This header is no longer used. This is the last file in arch/arm/mach-uniphier/include/mach/. At last, I've succeeded in eliminating the mach directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: drop unneeded EHCI pin mux settingsMasahiro Yamada
These pin mux settings are cared by the pinctrl drivers. Remove the ad-hoc code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: switch over to generic EHCI driverMasahiro Yamada
The UniPhier EHCI driver (drivers/usb/host/ehci-uniphier.c) does nothing special but set the base address and handle reset/clock. Since commit 4feefdcfe916 ("usb: add clock support for generic EHCI"), the generic one (drivers/usb/host/ehci-generic.c) can do those, too. We no longer need to stick to the dedicated driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add clocks properties to EHCI nodesMasahiro Yamada
This allows the EHCI driver to get clocks from device tree. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add device nodes for MIO control blockMasahiro Yamada
This block provides clock and reset control for MIO (Media I/O) hardware blocks such as USB2.0, SD card, eMMC, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add device nodes for Peripheral control blockMasahiro Yamada
This block provides clock and reset control for peripherals such as UART, I2C, IC card, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add device nodes for System Control blocksMasahiro Yamada
These are mainly used for controlling clocks and resets. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: dts: uniphier: add reference clock nodesMasahiro Yamada
Add master clock nodes generated by crystal oscillators. PH1-sLD3, PH1-LD4: 24.576 MHz PH1-Pro4, ProXstream2: 25.000 MHz PH1-Pro5: 20.000 MHz Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14clk: uniphier: add Media I/O clock driver for UniPhier SoCsMasahiro Yamada
This is the initial commit for the UniPhier clock drivers. Currently, only the Media I/O clock is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: support USB boot mode for ProXstream2 / PH1-LD6b SoCMasahiro Yamada
The USB boot code is too fat and complicated to be included in SPL (at least for now). So, it was implemented as a separate project (what we call USB-loader). The expected boot sequence is as follows: Boot ROM -> USB-loader -> SPL -> U-Boot proper The USB-loader loads the SPL and U-Boot proper from a USB memory onto the locked L2 cache. Then, SPL needs to copy the U-Boot proper to DRAM, so this mode looks like a NOR boot from the view of SPL. However, we want to distinguish between (genuine) NOR boot and USB boot in some places. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: add missing static qualifierMasahiro Yamada
This function is for local use in the file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-02-14ARM: uniphier: create early page table at run-timeMasahiro Yamada
UniPhier SoCs are not equipped with dedicated on-chip SRAM. Instead, locked outer cache is used as RAM area during the early boot stage where DRAM is not ready yet. This effectively means MMU must be always enabled while we are in SPL. Currently, the SPL image for UniPhier SoCs contains the page table statically defined at compile time. It has been a burden because the 16KB page table occupies a quarter memory footprint of the 64KB SPL image. Finally, there is no more room to implement new features in SPL. Setting aside the NOR boot mode, this issue can be solved by creating the page table onto RAM at run time. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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