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2016-01-14arm: mvebu: Enable L2 cache on Armada XPStefan Roese
Until now, the L2 cache was never enabled again in U-Boot. To get even better performance (bootup time), lets enable the L2 cache in U-Boot. This code was taken from the Linux kernel. A performance gain was measured on the DB-MV784MP-GP board by testing with tftpboot and sata commands. This patch also cleans up the L2 cache related code. And makes sure that the L2 cache is only disabled once. Please note that A38x still runs with L2 cache disabled. And needs to be enabled for this SoC in a separate patch if needed or desired. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Add SolidRun ClearFog Armada 38x initial supportStefan Roese
This patch adds basic support for the SolidRun ClearFog Armada 38x based board to mainline U-Boot. Supported interfaces / devices are: - DDR3 - UART - MMC - Ethernet port 0 (connected to dedicated PHY) - I2C The included DT source was taken from Russell King's ftp server: http://www.home.arm.linux.org.uk/~rmk/clearfog/ With only minor modifications, like the addition of some aliases and the "u-boot,dm-pre-reloc" property. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Move some defines to common include fileStefan Roese
This patch moves some config options to the mvebu common include file. Making it easier to not forget these defines for new boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
2016-01-14net: mvneta: Convert to driver modelStefan Roese
Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
2016-01-14arm: mvebu: armada-388-gp.dts: Add ethernet aliasesStefan Roese
Adding these aliases enables the update of the MAC addresses from within U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Add armada-xp-maxbcm.dts for maxbcm boardStefan Roese
This is needed for the upcoming ethernet DM conversion of the maxbcm board. The configuration of the PHY is then extracted from the DT instead of using the defines from the config header. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2016-01-14arm: mvebu: Add SPI driver model supportStefan Roese
This patch enables the DM support for the SPI driver and the SPI NOR flash chips. Some MVEBU boards boot from SPI NOR, so adding the aliases and enabling CONFIG_DM_SEQ_ALIAS is needed here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
2016-01-14arm: mvebu: Add DM and OF_CONTROL support to SPLStefan Roese
This patch adds full DM support to the SPL on MVEBU. Currently only serial is supported. Other drivers will follow. This patch also adds the necessary config values for the DEBUG UART to the MVEBU defconfig files. This came in handy while implementing this DM support. Additionally, the mvebu specific SPL linker script is removed and this common one is used instead: arch/arm/cpu/u-boot-spl.lds This common linker script already handles all special cases. No need to reinvent the wheel for MVEBU here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
2016-01-14arm: mvebu/kirkwood: Use common timer functionsStefan Roese
By using the common timer functions for mvebu/kirkwood we can get rid of quite a lot of code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
2016-01-13arm: dts: am4372: add qspi register maps for memory mapMugunthan V N
Add qspi memory map address to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra72-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra7-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: am437x-gp-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra7: add qspi register maps for memory map and control moduleMugunthan V N
Add qspi memory map and control module register maps to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13dts: dra7: add spi alias for qspiMugunthan V N
add spi alias for qspi so that spi probes the device and driver successfully. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-12Merge git://git.denx.de/u-boot-dmTom Rini
2016-01-12rockchip: Use the debug UART on rk3036Simon Glass
Rather than using a new debug UART implementation, use the standard one provided by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-12dm: tegra: net: Convert tegra boards to driver model for EthernetSimon Glass
Adjust all Tegra boards to use driver model for Ethernet, now that the required drivers are converted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-01-13ARM: uniphier: add dump command for DDR Multi PHY registersMasahiro Yamada
The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY which is not register-compatible with the former SoCs. Add a new command to support the register dump of this IP. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: add DRAM init code for ProXstream2/PH1-LD6bMasahiro Yamada
As mentioned in the log of commit 019df879a93e2 (ARM: uniphier: add ProXstream2 and PH1-LD6b support), the DRAM init code was missing for a long time. Finally, here it is. SPL works now. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: move headers out of include/mach directoryMasahiro Yamada
These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: move cmd_pinmon.c to boot-mode subdirectoryMasahiro Yamada
This command shows the boot mode pins, so it would be more at home in the boot-mode subdirectory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: move cmd_ddrphy.c to dram subdirectoryMasahiro Yamada
This command shows the register dump of the DDR PHY, so it would be more at home in the dram subdirectory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13ARM: uniphier: kill bogus header includesMasahiro Yamada
These includes are not necessary. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-08am33xx/am43xx: Add platform data for GPIOsTom Rini
On these platforms we have many cases of boards that enable device model and GPIO support but do not enable OF_CONTROL and pass in a device tree with the binary. We need to bring in the platform data here as well. Tested on Beaglebone Black. Reported-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com> Reported-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-03Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-01-03imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic
Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
2016-01-03ARM: mxs: allow boards to select DC-DC switching clock sourceMichael Heimpold
For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons. For this, override the mxs_power_setup_dcdc_clocksource function in your board support files. Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); } Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2016-01-03imx: ddr: drop duplicated debug infoPeng Fan
Drop duplicated debug info for tcl. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
2015-12-24Merge git://git.denx.de/u-boot-socfpgaTom Rini
Conflicts: include/configs/axs101.h Signed-off-by: Tom Rini <trini@konsulko.com>
2015-12-22arm: socfpga: Unreset NAND in U-BootMarek Vasut
Make sure the NAND reset is not asserted in full U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
2015-12-22arm: socfpga: Unreset NAND in SPLMarek Vasut
If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-22arm: socfpga: Define NAND reset bitMarek Vasut
Define the NAND reset bit and fix the ordering of the macros. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-23ARM: dts: uniphier: add SD/MMC pinmux nodesMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: set DTB file name to fdt_file environmentMasahiro Yamada
When we want to boot Linux with a DTB file downloaded from a TFTP server or somewhere, we need to know the file name to be downloaded. Assume the U-Boot configuration is shared among some similar boards. If they are similar enough, the difference only appears in device trees. The build procedure would be like this: - Board A: make foo_common_defconfig && make DEVICE_TREE=foo_board_a - Board B: make foo_common_defconfig && make DEVICE_TREE=foo_board_b - Board C: make foo_common_defconfig && make DEVICE_TREE=foo_board_c In this case, the U-Boot image contains nothing about the DTB file name it is running with. (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this purpose because it is painful to change it from "make menuconfig" for each board.) This commit allows to lookup the DTB file name based on the compatible string and set it to "fdt_file" environment. Then "tftpboot $fdt_file" will download the file we want. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: merge umc/ and ddrphy/ into a single directoryMasahiro Yamada
The UMC (Universal Memory Controller) and the DDR PHY block are highly related to each other. It is better to have both code in the same directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: display model number all the time on boot upMasahiro Yamada
Both "Model 1" and "Model 2" are supported for ProXstream2 and PH1-LD6b boards. It is useful to show the model number in the boot banner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: add macros and revision IDs for sLD11 and LD10Masahiro Yamada
These are new SoCs from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: compile uniphier_get_board_param() for U-Boot properMasahiro Yamada
Compile this file for U-Boot proper as well as SPL, so that the U-Boot proper can call uniphier_get_board_param(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: split ProXstream2 board data and change DDR frequencyMasahiro Yamada
The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz, while only up to 1866MHz on PH1-LD6b boards. Split the board data structure and change the DDR frequency of ProXstream2 boards to 2133 MHz. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: call uniphier_get_board_param() without FDT blobMasahiro Yamada
Move "gd->fdt_blob" from the caller to the callee so that this function can be used more easily. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: add functions to get SoC model/revisionMasahiro Yamada
We sometimes have to implement different code depending on the SoC revision. This commit adds functions to get the model/revision number. Note: Model number: incremented on major changes of the SoC Revision number: incremented on minor changes of the SoC The "Model 2" exists for PH1-sLD3, ProXstream2/PH1-LD6b. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: dts: uniphier: use stdout-path instead of consoleMasahiro Yamada
Sync device trees with Linux. Linux commit: 06ff6b2d63210922a1b1d0f4997e29ce75b5e0c0 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: dts: uniphier: add outer cache nodesMasahiro Yamada
These nodes are not parsed by U-Boot for now, but syncing device trees with Linux is helpful for easier diffing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsiMasahiro Yamada
UniPhier SoCs (except PH1-sLD3) have several nodes in common. Factor out them into uniphier-common32.dtsi. This improves the code maintainability. PH1-sLD3 is so old that it has more or less different register maps than the others. So, it cannot be included in this refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: allow DDR function to return more precise error codeMasahiro Yamada
Return different error code depending on the reason so that the caller can know the cause of the failure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: use BIT() macro for DDR PHY headerMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_*Masahiro Yamada
The bit 27-24 of the DTCR register is described as RANKEN in the DDR PHY databook. Follow this abbreviation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: add const qualifier to constant arrayMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-12-23ARM: uniphier: add static qualifiers to locally used functionsMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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