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2017-08-16Merge git://www.denx.de/git/u-boot-imxTom Rini
Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-16env: Rename eth_getenv_enetaddr() to eth_env_get_enetaddr()Simon Glass
Rename this function for consistency with env_get(). Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass
We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename eth_setenv_enetaddr() to eth_env_set_enetaddr()Simon Glass
Rename this function for consistency with env_set(). Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename common functions related to setenv()Simon Glass
We are now using an env_ prefix for environment functions. Rename these commonly used functions, for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename setenv() to env_set()Simon Glass
We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16imx: mx7: fix build warning when CONFIG_IMX_RDC not enabledPeng Fan
Fix build warning when CONFIG_IMX_RDC not defined in defconfig. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-16imx: mx6sl: simplify code using setbits_le32Peng Fan
Simplify code by removing set_preclk_from_osc with directly setbits_le32. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-16imx: mx6sx: select OSC as uart's clk parentPeng Fan
As M4 is sourcing UART clk from OSC, to make UART work when M4 is enabled, need to select OSC as clk parent, 24M OSC is enough for debug UART in uboot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-16imx: mx6: soc: fix mx6sll settingsPeng Fan
There is not LDO_SOC/PU/ARM/MMDC1 on i.MX6SLL, also no need to gate/ungate all PFDs to make PFD working. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-16imx: mx6: select ARM_ERRATA_845369Peng Fan
Select ARM_ERRATA_845369 for i.MX6DQ/DL/QP. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-08-16arm: Implement workaround for Cortex-A9 errata 845369Peng Fan
Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-08-16ARM: i.MX6: exclude the ARM errata from i.MX6 UP systemPeng Fan
The ARM errata 751472, 794072, 761320 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-16imx: imx6ull: correct get_cpu_speed_grade_hzSébastien Szymanski
i.MX6ULL has different speed grades than i.MX6UL. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2017-08-16imx: imx6ul: correct get_cpu_speed_grade_hz on 696MHz SoCsSébastien Szymanski
Return the correct value when the speed grade is 696MHz. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2017-08-16imx6: clock: correct comment for PLL_VIDEOAnatolij Gustschin
This appear to be a copy-paste error, clean it up. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-08-16imx6: use SION macro in SDn_CMD mux mode bitfield argumentsAnatolij Gustschin
Select SION by appropriate macro instead of constant. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-08-15env: Drop saveenv() in favour of env_save()Simon Glass
Use the env_save() function directly now that there is only one implementation of saveenv(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-15env: Convert CONFIG_ENV_IS_IN... to a choiceSimon Glass
At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-14Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini
2017-08-13stm32f1: remove stm32f1 supportPatrice Chotard
A few years ago STM32F1 SoCs support has been added : 0144caf22ce6acd5c gpio: stm32: add stm32f1 support 2d18ef2364fd3561a ARMv7M: add STM32F1 support But neither STM32F1 dedicated defconfig nor board was associated to these commits. Got confirmation from Tom Rini and Matt Porter to remove all this code [1] [1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13ARM: OMAP5: Enable support for AVS0 for OMAP5 production devicesNishanth Menon
OMAP5432 did go into production with AVS class0 registers which were mutually exclusive from AVS Class 1.5 registers. Most OMAP5-uEVM boards use the pre-production Class1.5 which has production efuse registers set to 0. However on production devices, these are set to valid data. scale_vcore logic is already smart enough to detect this and use the "Nominal voltage" on devices that do not have efuse registers populated. On a test production device populated as follows: MPU OPP_NOM: => md.l 0x04A0021C4 1 4a0021c4: 03a003e9 .... (0x3e9 = 1.01v) vs nom voltage of 1.06v MPU OPP_HIGH: => md.l 0x04A0021C8 1 4a0021c8: 03400485 ..@. MM OPP_NOM: => md.l 0x04A0021A4 1 4a0021a4: 038003d4 .... (0x3d4 = 980mV) vs nom voltage of 1.025v MM OPP_OD: => md.l 0x04A0021A8 1 4a0021a8: 03600403 ..`. CORE OPP_NOM: => md.l 0x04A0021D8 1 4a0021d8: 000003cf .... (0x3cf = 975mV) vs nom voltage of 1.040v Since the efuse values are'nt currently used, we do not regress on existing pre-production samples (they continue to use nominal voltage). But on boards that do have production samples populated, we can leverage the optimal voltages necessary for proper operation. Tested on: a) 720-2644-001 OMAP5UEVM with production sample. b) 750-2628-222(A) UEVM5432G-02 with pre-production sample. Data based on OMAP5432 Technical reference Manual SWPU282AF (May 2012-Revised Aug 2016) NOTE: All collaterals on OMAP5432 silicon itself seems to have been removed from ti.com, though EVM details are still available: http://www.ti.com/tool/OMAP5432-EVM Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13ARM: OMAP5: Remove OPP_LOW Definitions for ES2.0Nishanth Menon
ES2.0 descopes OPP_LOW definition. So remove it from macros defined. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13stm32: remove redundant 'else if'xypron.glpk@gmx.de
The if in the else branch is superfluous. We can use a simple if. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: mvebu: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense to check if info is NULL after dereferencing it. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-13armv7m: mpu_config add missing breakxypron.glpk@gmx.de
For DEVICE_NON_SHARED the newly assigned value of attr is overwritten due to a missing break. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13bcm281xx: clock: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense first to dereference c and then to check if it is NULL. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: bcm235xx: clk_set_rate avoid possible NULL derefxypron.glpk@gmx.de
It does not make sense first to dereference c and then to check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: bcm235xx: avoid possible NULL dereferencexypron.glpk@gmx.de
It does not make sense to first dereference c and then check if it is NULL. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13arm: spear: do not return random value from stackxypron.glpk@gmx.de
If the NOR device is not available do not return a random value from the stack. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-08-13rockchip: rk322x: update max-frequency for mmc nodeKever Yang
mmc using 150000000 as max-frequency like what rk3288 sets. This can speed up the mmc read/write, the actual mmc clock is: Before this patch: 37.125M After this patch: 49.5M Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: dts: rk322x: add sdmmc device nodeKever Yang
add node for sdmmc in dts and rk3229-evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk322x: set the DDR region as non-secure in SPLKever Yang
Disable the ddr secure region setting in SPL and the ddr memory becomes non-secure, every one can access it. the trust firmware like OPTEE should have the correct setting for it after SPL if there is one. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: rk3288: fix EMMC_DIV_MASK definition in headerKever Yang
It should be '<<' instead of '<' for _MASK definition, fix it. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: move SPL_LDSCRIPT to KconfigPhilipp Tomsich
With the new way of doing things (i.e. the hierarchical selection of SPL_LDSCRIPT via Kconfig) in place, this moves the SPL_LDSCRIPT setting for the RK3368 from defconfig back into Kconfig. With this done, there should be no lingering cases of SPL_LDSCRIPT outside of Kconfig files. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13spl: add hierarchical defaults for SPL_LDSCRIPTPhilipp Tomsich
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3188: rock: adjust for SPL/TPL splitPhilipp Tomsich
With the changes to split SPL/TPL for the RK3368, I apparently missed some needed adjustments to the RK3188 Kconfig and rock_defconfig. This fixes build-issues for the rock board after applying the RK3368 enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT, TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols now. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: add u-boot specific dts for rk3368 based boardsAndy Yan
Device drivers like debug serial, dmc should be enabled before relocation, so add u-boot.dtsi files to contain devices that should be marked as dm-pre-reloc. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: remove setup of secure timer from TPL/SPLPhilipp Tomsich
When using DM timers w/ the timer0 block within the RK3368, we no longer depend on the ARMv8 generic timer counting. This allows us to drop the secure timer initialisation from the TPL and SPL stages. The secure timer will later be set up by ATF, which starts the ARMv8 generic timer. Thus, there will be a dependency from Linux to the ATF through the ARMv8 generic timer... this seems reasonable, as Linux will require the ATF (and PSCI) to start up the secondary cores anyway (in other words: we don't add any new dependencies). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13dts: rk3368: make timer0 accessible for SPL and TPLPhilipp Tomsich
To use it with the DM timer driver in SPL and TPL, timer0 needs to be marked as pre-reloc. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13dm: timer: normalise SPL and TPL supportPhilipp Tomsich
To fully support DM timer in SPL and TPL, we need a few things cleaned up and normalised: - inclusion of the uclass and drivers should be an all-or-nothing decision for each stage and under control of $(SPL_TPL_)TIMER instead of having the two-level configuration with TIMER and $(SPL_TPL_)TIMER_SUPPORT - when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can not be compiled in This normalises configuration to $(SPL_TPL_)TIMER and moves the config options to drivers/timer/Kconfig (and cleans up the collateral damage to some defconfigs that had SPL_TIMER_SUPPORT enabled). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZEPhilipp Tomsich
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: mark TPL as not inheriting its stack, text-base and size ↵Philipp Tomsich
from SPL The RK3368 needs to have a different base-address and stack-pointer for its TPL stage. Now that we want to do this via Kconfig, we need to tick the appropriate 'TPL_NEEDS_...' boxes. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13armv8: TPL_STACK will always be defined, so test CONFIG_TPL_NEEDS_SEPARATE_STACKPhilipp Tomsich
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying: the 'moving off the whitelist' part comes in once moveconfig runs... which will be a few commits down the line) and added to Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see whether the value from TPL_STACK should be used or whether we try to inherit whatever SPL uses. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368Philipp Tomsich
Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-08-13rockchip: board: lion-rk3368: add support for the RK3368-uQ7Philipp Tomsich
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm, MXM-230 edge connector compatible with the Qseven specification) form-factor system-on-module based on the octo-core Rockchip RK3368. It is designed, supported and manufactured by Theobroma Systems. It provides the following features: - 8x Cortex-A53 (in 2 clusters of 4 cores each) - (on-module) up to 4GB of DDR3 memory - (on-module) SPI-NOR flash - (on-module) eMMC - Gigabit Ethernet (with an on-module KSZ9031 PHY) - USB - HDMI - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: mark SPL and TPL as supported for ROCKCHIP_RK3368Philipp Tomsich
With SPL and TPL support for the RK3368 in place, mark SPL and TPL as supported from Kconfig for the RK3368. As this is primarily tested on the RK3368-uQ7, we'll leave it to board's individual defconfig to enable. Also enable DEBUG_UART_BOARD_INIT for the RK3368, so we get output during the early boot-up, as we turn on TPL and SPL. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add SPL supportPhilipp Tomsich
Adds SPL support for the RK3368 (assuming that our TPL stage has initialised DRAM and set up the memory firewall). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: spl: make spl-boot-order code reusable (split from rk3399)Philipp Tomsich
In order to reuse the support for the u-boot,spl-boot-order property from the rk3399, we split it into a reusable module that can be included by the SPL code for any of our boards. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13rockchip: rk3368: spl: add TPL supportPhilipp Tomsich
This adds the TPL support for the RK3368, including the u-boot-tpl.lds. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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