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2017-12-18rockchip: update boot0 hookKever Yang
Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not need it. The very beginning of U-Boot proper is different between armv7 and armv8: armv7 start with ARM_VECTORS while armv8 start with 'b reset'. Here is the map of very beginning for all cases: armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS armv7 U-Boot: ARM_VECTORS armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399) armv8 U-Boot: 'b reset' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-16efi_loader: helloworld.c: Reduce file sizeAlexander Graf
The efi linker script includes sections needed for the dynamic linker. However, in our EFI application environment we don't have a dynamic linker. So let's remove them. That way we save on 4k padding and reduce the file size of the hello world efi binary from ~4k to ~1k. Signed-off-by: Alexander Graf <agraf@suse.de>
2017-12-14Merge git://git.denx.de/u-boot-dmTom Rini
2017-12-14arm64: zynqmp: Add missing zynq_board_read_rom_ethaddr() prototypeMichal Simek
Add missing zynq_board_read_rom_ethaddr() prototype reported by sparse. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2017-12-14arm64: zynqmp: Use only earlycon bootargs instead of full oneMichal Simek
This is the same patch as was done earlier. Please look at Linux patch: "arm64: zynqmp: Use only earlycon bootargs instead of full one" (sha1: f3609c8d4af28b9cc22ca49bf8e529b582ec188c) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Remove undocumented dma propertiesMichal Simek
Remove overfetch, ratectrl, include-sg and src-issue dma properties. Driver is not using them and they are also not documented in the binding doc. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Kedareswara rao Appana <appanad@xilinx.com>
2017-12-14arm64: zynqmp: Add generic compatible string for I2C EEPROMJavier Martinez Canillas
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Enable phys for zcu102Michal Simek
Enable USB3.0 and SATA phy for zcu102 boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Enable SPL_CLK when SPL is enabledMichal Simek
Setup proper dependency in Kconfig for SPL_CLK. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Add support for generic QSPI bootMichal Simek
This patch is enabling support for SPL QSPI boot. First of all it is necessary to generate atf-spi.ub which is different format than atf-uboot.ub (this can be made as legacy image too) ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'` aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin ./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin atf-uboot.ub ./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf-for-qspi" -E -d bl31.bin atf-spi.ub This patch is using this QSPI layout with offsets: 0 boot.bin 512k atf-ub 640k u-boot.bin 1280k u-boot.img Which corresponding by writing these images(read from MMC) mmcinfo sf probe load mmc 0 10000000 boot.bin sf erase 0 +$filesize sf write 10000000 0 $filesize load mmc 0 10000000 atf-spi.ub sf erase 0x80000 +$filesize sf write 10000000 0x80000 $filesize load mmc 0 10000000 u-boot.bin sf erase 0xa0000 +$filesize sf write 10000000 0xa0000 $filesize load mmc 0 10000000 u-boot.img sf erase 0x140000 +$filesize sf write 10000000 0x140000 $filesize For testing u-boot running in EL3 you can break atf-spi.ub like this: sf probe sf erase 0x80000 +4 Then u-boot.img is executed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Add reference to pmu firmware nodeMichal Simek
This reference is needed for pinctrl driver where some signals can be routed directly to platform management unit (PMU). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-13Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-shTom Rini
2017-12-13Merge git://git.denx.de/u-boot-samsungTom Rini
2017-12-13armv8: layerscape: Discard the needless cpu nodesWenbin song
Using "cpu_pos_mask()" function to detect the real online cpus, and discard the needless cpu nodes on kernel dts. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-13armv8: ls1043a/ls2080a: check SoC by device IDWenbin song
Check LS1043A/LS2080a by device ID without using personality ID to determine revision number. This check applies to all various personalities of the same SoC family. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-12binman: tegra: Convert to use binmanSimon Glass
Update tegra to use binman for image creation. This still includes the current Makefile logic, but a later patch will remove this. Three output files are created, all of which combine SPL and U-Boot: u-boot-tegra.bin - standard image u-boot-dtb-tegra.bin - same as u-boot-tegra.bin u-boot-nodtb-target.bin - includes U-Boot without the appended device tree The latter is useful for build systems where the device is appended later, perhaps after being modified. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-12binman: arm: Include the binman symbol tableSimon Glass
This area of the image contains symbols whose values are filled in by binman. If this feature is not used, the table is empty. Add this to the ARM SPL link script. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-12ARM: pxa: Remove unused ifdefsTuomas Tynkkynen
These ifdefs are protecting #include statements for files that have never existed. AFAICT this hardware.h has been copied from the kernel and the ifdefs have never served a role in U-Boot, so delete them. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12ata: Migrate CONFIG_MVSATA_IDE to KconfigTuomas Tynkkynen
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12ata: Migrate CONFIG_LIBATA to KconfigTuomas Tynkkynen
This symbol enables some library code used by various SATA drivers, so make this a non-user-visible symbol select'ed by the respective drivers, and let moveconfig handle the rest. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12ata: Migrate CONFIG_SCSI_AHCI to KconfigTuomas Tynkkynen
And use 'imply' liberally. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-12-12ARM: uniphier: use FIELD_PREP for PLL settingsMasahiro Yamada
It is tedious to define both mask and bit-shift. <linux/bitfield.h> provides a convenient way to get access to register fields with a single shifted mask. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compute SSCPLL values more preciselyMasahiro Yamada
Use DIV_ROUND_CLOSEST(). To make the JK value even more precise, I used a bigger coefficient, then divide it by 512. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: fix SSCPLL init code for LD11 SoCDai Okamura
Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") missed to write the computed value to the SSCPLLCTRL2 register. Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compile pll-base-ld20.c for PXs3Masahiro Yamada
Fix the link error for the combination of CONFIG_ARCH_UNIPHIER_LD11=n CONFIG_ARCH_UNIPHIER_LD20=n CONFIG_ARCH_UNIPHIER_PXS3=y Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-09ARM: rmobile: Add R8A77995 D3 Draak boardMarek Vasut
Add bits to support yet another board, the R8A77995 D3 Draak. The DT file is from Linux 4.15-rc1 , commit b35334447513c14a4dd55a67c269a743d4a4824b . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 V3M Eagle boardMarek Vasut
Add bits to support yet another board, the R8A77970 V3M Eagle. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77995 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77995 D3 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77970 V3M . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-08sunxi: Add the TBS A711 tabletMaxime Ripard
The TBS Tablet sports an LVDS display, an eMMC, an external SD, USB devices and USB OTG. Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-12-07Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-12-07armv8: fix gd after relocationYork Sun
Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18 without checking the return value of spl_relocate_stack_gd(). Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: York Sun <york.sun@nxp.com> CC: Kever Yang <kever.yang@rock-chips.com> CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: Workaround for USB erratua on LS1012ARan Wang
This is suplement for patch which handle below errata: A-009007, A-009008, A-008997, A-009798 Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: fsl-layerscape: Add support of disabling core prefetchPrabhakar Kushwaha
Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-05arm: dts: exynos4: fix the device-tree compile warningJaehoon Chung
After updating dtc-1.4.5 version, there are too many warning. This patch is to fix about exynos4 series. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2017-12-04Merge git://git.denx.de/u-boot-uniphierTom Rini
2017-12-04arm: Make gcc 6.0 or later a hard requirement now.Tom Rini
Move the warning to an error as we have been promising would happen in this release. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04armv8: mmu: fix page table mappingPeng Fan
To page mapping the lowest 2 bits needs to be 0x3. If not fix this, the final lowest 3 bits for page mapping is 0x1 which is marked as reserved. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-04arm64 :show_regs: show the address before relocationPeng Fan
After relocation, when error happends, it is hard to track ELR and LR with asm file objdumped from elf file. So subtract the gd->reloc_off the reflect the compliation address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-04ARM: arch-meson: build memory banks using reported memory from registersNeil Armstrong
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware and a secondary BL32 firmware. Since mid-2017, the reserved memory address of the BL31 firmware was moved and grown for security reasons. But mainline U-Boot and Linux has the old address and size fixed. These SoCs have a register interface to get the two firmware reserved memory start and sizes. This patch adds a dynamic reservation of the memory zones in the device tree bootmem reserved memory zone used by the kernel in early boot. To be complete, the memory zones are also added to the EFI reserved zones. Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2]. [1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html [2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html Changes since v1: - switched the #if to if(IS_ENABLED()) to compile all code paths - renamed function to meson_board_add_reserved_memory() - added a mem.h header with comment - updated all boards ft_board_setup() Changes since RFC v2: - reduced preprocessor load - kept Odroid-C2 static memory mapping as exception Changes since RFC v1: - switch to fdt rsv mem table and efi reserve memory - replaced in_le32 by readl() Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [trini: Fix warning on khadas-vim over missing <asm/arch/mem.h> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04arm: Add Khadas VIM support based on Meson GXL familyNeil Armstrong
This adds platform code for the Khadas VIM board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04arm: Add LibreTech CC support based on Meson GXL familyNeil Armstrong
This adds platform code for the Libre Computer CC "Le Potato" board based on a Meson GXL (S905X) SoC with the Meson GXL configuration. This initial submission supports UART, MMC/SDCard and Ethernet with the Internal RMII PHY. The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13 stable tree as of 4.13.8. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04ARM: arch-meson: add ethernet common init functionNeil Armstrong
Introduce a generic common Ethernet Hardware init function common to all Amlogic GX SoCs with support for the Internal PHY enable for GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04armv8: shrink exception table codeAndre Przywara
In the moment our exception entry code needs 34 instructions, so we can't use put it directly into the table entry, which offers "only" 32 instructions there. Right now we just put an unconditional branch there, then use a macro to place the 34 instructions *per entry* after that. That effectivly doubles the size of our exception table, which is quite a waste, given that we use it mostly for debugging purposes. Since the register saving part is actually identical, let's just convert that macro into a function, and "bl" into it directly from the exception slot, of course after having saved at least the original LR. This saves us about 950 bytes of code, which is quite a relief for some tight SPLs, in particular the 64-bit Allwinner ones. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2017-12-04add support for Raspberry Pi Zero WDmitry Korunov
Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
2017-12-04mtd: nand: Rename nand.h into rawnand.hMasahiro Yamada
This header was renamed to rawnand.h in Linux. The following is the corresponding commit in Linux. commit d4092d76a4a4e57b65910899948a83cc8646c5a5 Author: Boris Brezillon <boris.brezillon@free-electrons.com> Date: Fri Aug 4 17:29:10 2017 +0200 mtd: nand: Rename nand.h into rawnand.h We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-04ARM: uniphier: clean up board_initMasahiro Yamada
Remove unnecessary DECLARE_GLOBAL_DATA_PTR and header includes. <common.h> has been replaced with <linux/errno.h> and <linux/printk.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-02omap2: set the ethaddr as well as the usbethaddr env var to ensure static MACPeter Robinson
The kernel gets the ethernet MAC from the ethaddr variable, the omap boards for devices with USB based eth adapters just set the usbethaddr which doesn't appear to get passed to the kernel. The same Raspberry Pi code sets both ethaddr and usbethaddr so lets do that so linux (tested 4.13 and 4.14) get a static rather than a random MAC address, while not regressing users of usbethaddr. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2017-12-02sunxi: set the default CPUx frequency of H5 to 816MHzIcenowy Zheng
Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano Pi NEO2), which may not work properly at 1008MHz if the chip's quality is not so good. Lower the default CPUx frequency of H5 to 816MHz. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com>
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