summaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2019-05-01Merge tag 'rockchip-for-2019.07' of git://git.denx.de/u-boot-rockchipTom Rini
Improvements and new features: - improved SPI driver for better read throughput - refactors initialisation of debug UART init - restructures header file paths - adds pinctrl improvements Adds Kever as a co-custodian.
2019-05-01Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imxTom Rini
Porting to DM and i.MX8 ------------------------ - warp7 to DM - kp_imx53 to DM - Warnings in DT - MX8QM support - colibri-imx6ull to DM - imx7d-pico to DM - ocotp for MX8
2019-05-01rockchip: rk3288: include header for back_to_bootromPhilipp Tomsich
To avoid a warning, we need to include the header defining back_to_bootrom for us. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3399: include gpio.hPhilipp Tomsich
After applying the series for debug_uart_init(), Travis-CI reports: arch/arm/mach-rockchip/rk3399/rk3399.c:90:2: error: implicit declaration of function 'spl_gpio_set_pull' [-Werror=implicit-function-declaration] spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL); ^~~~~~~~~~~~~~~~~ This is caused by a missing header-file include. Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3399: add board_debug_uart_init()Kever Yang
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3399: use grf structure to access regKever Yang
Prefer to use structure to access register if we could. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3368: move board_debug_uart_init() to rk3368.cKever Yang
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3288: add board_debug_uart_init()Kever Yang
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file for all rockchip SoCs later. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3288: use grf structure to access soc_con2Kever Yang
Prefer to use structure to access register if we can. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk322x: move board_debug_uart_init() to rk322x.cKever Yang
Move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file later for all rockchip SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Fixed up header-list to not break FASTBOOT:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3188: add board_debug_uart_init()Kever Yang
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3036: add board_debug_uart_init()Kever Yang
Use board_debug_uart_init() for UART iomux init instead of do it in board_init_f, and move the function to soc file so that we can find all the soc/board setting in soc file and use a common board file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [Fixed whitespace error:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: enable DEBUG_UART_BOARD_INIT by defaultKever Yang
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board UART IOMUX, enable it by default. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: correct ARCH_SOC nameKever Yang
The ARCH_SOC name default as 'rockchip' and we put all the header file in 'arch/arm/include/asm/arch-rockchip/', but the 'rockchip' is not the SOC name, let's correct it after we update all the source file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsiich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: use 'arch-rockchip' as header file pathKever Yang
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: arm: use 'arch-rockchip' for common headerKever Yang
rockchip platform header file is in 'arch-rockchip' instead of arch-$(SOC) for all SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: arm: remove no use macroKever Yang
TIMER7_BASE is no used by source code now, remove it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rk3288-board: remove pinctrl call for debug uartUrja Rannikko
This failed and caused a boot failure on c201, and afaik the pins should be setup by the new pinctrl driver. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: rk3399: Add Orangepi RK3399 supportJagan Teki
Add initial support for Orangepi RK3399 board. Specification - Rockchip RK3399 - 2GB/4GB DDR3 - 16GB eMMC - SD card slot - RTL8211E 1Gbps - AP6356S WiFI/BT - HDMI In/Out, DP, MIPI DSI/CSI - Mini PCIe - Sensors, Keys etc - DC12V-2A and DC5V-2A Commit details about Linux DTS sync: "arm64: dts: rockchip: Add support for the Orange Pi RK3399" (sha1: d3e71487a790979057c0fdbf32f85033639c16e6) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsiJagan Teki
u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and which is U-Boot specific devicetrees binding. Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot bindings will move it future based on the requirement. This would help to sync the devicetrees from Linux whenever required instead of adding specific nodes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01rockchip: dts: rk3399: Sync rk3399-opp from LinuxJagan Teki
Sync rk3399-opp.dtsi from Linux. Linux commit details about the rk3399-opp.dtsi sync: "arm64: dts: rockchip: use SPDX-License-Identifier" (sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-26arm: dts: add missing vexpress device treesHeinrich Schuchardt
Add the device trees for * vexpress_ca5x2_defconfig * vexpress_ca9x4_defconfig * vexpress_ca15_tc2_defconfig as available in Linux 5.1 rc5. We are using the vexpress_ca15_tc2_defconfig and vexpress_ca9x4_defconfig for Travis testing via QEMU. The UEFI base Embedded Base Boot Requirements Specification (EBBR) requires that an embedded board either provides a device tree or an ACPI table. All block devices are meant to be moved to the driver model. On ARM this requires a device tree. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-04-26arm: lpc32xx: Fix timer initializationGregory CLEMENT
The match controller register is not cleared during initialization. However, some bits of this register may reset the TC if tnMRx match it. As we can't make any assumption about how U-Boot is launched by the first stage bootloader (such as S1L) clearing this register ensure that the timers work as expected. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-04-26arm: mach-k3: Add secure device build supportAndrew F. Davis
K3 HS devices require signed binaries for boot, use the SECDEV tools to sign the boot artifacts during build. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
2019-04-26arm: mach-k3: Add secure device supportAndrew F. Davis
K3 devices have High Security (HS) variants along with the non-HS already supported. Like the previous generation devices (OMAP/Keystone2) K3 supports boot chain-of-trust by authenticating and optionally decrypting images as they are unpacked from FIT images. Add support for this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
2019-04-26arm: K3: Avoid use of MCU_PSRAM0 before SYSFW is loadedAndrew F. Davis
On HS devices the 512b region of reset isolated memory called MCU_PSRAM0 is firewalled by default. Until SYSFW is loaded we cannot use this memory. It is only used to store a single value left at the end of SRAM by ROM that will be needed later. Save that value to a global variable stored in the .data section. This section is used as .bss will be cleared between saving this value and using it. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-04-26Merge git://git.denx.de/u-boot-marvellTom Rini
- Add DM based generic watchdog start and reset implementation and remove all ad-hoc implementations (Stefan) - Move mv_sdhci to DM (Pierre) - Misc turris_omnia updates (Pierre) - Change openrd targets to correctly build again (size changes and fixes to the dts targets) and bring it back into Travis builds (Stefan) - Add Kirkwood db-88f6281-bp board (Chris)
2019-04-26Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2019-04-26watchdog: at91sam9_wdt: Remove now superfluous wdt start and resetStefan Roese
With the new generic function, the scattered other functions are now removed to be replaced by the generic one. The new version also enables the configuration of the watchdog timeout via the DT "timeout-sec" property (if enabled via CONFIG_OF_CONTROL). The watchdog servicing is enabled via CONFIG_WATCHDOG. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-26ARM: kirkwood: add db-88f6281-bp boardChris Packham
This is Marvell's Kirkwood development board. It has the following features - 512M DDR2 - 2 PCI connectors - 1 x1 PCI-e interface - 1 Gigabit Ethernet Port - 2 SATA Ports - USB 2.0 Interface - SDIO - 128M NAND Flash - 16M SPI Flash It can be strapped to boot from SPI or NAND so there are two defconfigs (one per boot media). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26arm: kirkwood: dts: Add openrd-* dtb makefile build targetsStefan Roese
The following Kirkwood dtb build targets are currently missing: kirkwood-openrd-base.dtb kirkwood-openrd-client.dtb kirkwood-openrd-ultimate.dtb This patch adds them to the Makefile to fix the build error. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chris Packham <judge.packham@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-26mmc: mv_sdhci: add driver model supportPierre Bourdon
The new DM implementation currently does not support the Sheeva 88SV331xV5 specific quirk present in the legacy implementation. The legacy code is thus kept for this SoC and others not yet migrated to DM_MMC. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2019-04-25warp7: Switch to DM USBPierre-Jean Texier
This commit switches to DM USB for warp7 and warp7_bl33 defconfigs. Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io> Signed-off-by: Joris Offouga <offougajoris@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25warp7: Switch to DM SerialPierre-Jean Texier
This commit switches to DM SERIAL for warp7 and warp7_bl33 defconfigs. Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io> Signed-off-by: Joris Offouga <offougajoris@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25ARM: dts: colibri-imx6ull: update device treeMarcel Ziswiler
Fix compatible node to use regular Toradex notation. Annotate device tree with standard Colibri pin muxing comments. Use open-drain I2C pin muxings. Alphabetically re-order iomuxc nodes. Rename snvs-ad7879-int-grp touch interrupt node as per Linux device tree. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25ARM: dts: colibri-imx6ull: add osc32k_32k_out pinctrlMarcel Ziswiler
Add GPIO1_IO03__OSC32K_32K_OUT pin muxing. While at it also fix indentation of pinfunc header file. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25ARM: dts: i.MX6Q: fix avoid_unnecessary_addr_size warningsMarcel Ziswiler
Re-synced the device tree with Linux 5.0. This fixes the following warnings: w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@2/endpoint@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@2/endpoint@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@2/endpoint@2:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@2/endpoint@3:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@2/endpoint@4:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@3/endpoint@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@3/endpoint@2:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@3/endpoint@3:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (reg_format): /soc/ipu@2800000/ port@3/endpoint@4:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@0: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@0: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@1: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@1: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@2: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@2: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@3: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@3: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@4: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@2/endpoint@4: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@1: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@1: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@2: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@2: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@3: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@3: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@4: Relying on default #address-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_default_addr_size): /soc/ipu@2800000/port@3/endpoint@4: Relying on default #size-cells value w+arch/arm/dts/imx6-apalis.dtb: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size' Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
2019-04-25imx: Add variscite DART-6UL Evaluation KitParthiban Nallathambi
Port for the DART-6UL Evaluation Kit SBC. Based on the variscite DART-6UL iMX6ULL SoM. CPU: Freescale i.MX6ULL rev1.1 900 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 43C Reset cause: POR Model: Variscite DART-6UL Evaluation Kit Board: Variscite DART-6UL Evaluation Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial@02020000 Out: serial@02020000 Err: serial@02020000 Net: FEC0 Working: - Eth0 - i2c - MMC/SD - eMMC - USB host - UART 1 Note: LCDIF porting needs DM_VIDEO https://lists.denx.de/pipermail/u-boot/2019-April/365506.html Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
2019-04-25imx: i.MX8MQ: clear ocotp error bitPeng Fan
In case ocotp error bit is set, clear it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25imx: add lowlevel init for ARM64Peng Fan
Sometimes we met SERROR, but only to catch it when Linux boots up. Let's enable catching in U-Boot to catch it ealier and ease debug. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-04-25ARM: imx: Fix typo in select option for ZMX25Chris Packham
Correct CPU_ARM926EJS1 to CPU_ARM926EJS. Reported-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-04-25dts: imx6ull: add USB aliases to support DMFilip Brozovic
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-04-25pico-imx7d: Convert DM MMCJoris Offouga
This patch enable convert DM MMC for imx7d-pico board and variant. Before the DM conversion only usdhc3 was enabled and therefore it appeared as MMC 0 to u-boot. After enabling MMC DM though usdhc3 defaults to MMC 2, which left unattended would drive changes to existing pico-pi bootscripts and environment variables that rely on mmc 0. Setup the alias of mmc0 and usdhc3 so that existing pico-imx7d boot code will work unmodified. When converting to DM_MMC it is necessary that SPL initializes eMMC by itself, so move the original eMMC initialization from U-Boot proper to SPL. Signed-off-by: Joris Offouga <offougajoris@gmail.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-25arm: dts: imx8dx: add lpuart1, lpuart2, lpuart3Marcel Ziswiler
Add support for lpuart1, lpuart2 and lpuart3. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25misc: imx8: remove duplicates from scfw apiMarcel Ziswiler
Remove duplicate function declarations from the SCFW API header file. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25Arm: imx7d-pico: Import all Linux device tree for Pico i.MX7D SOMJoris Offouga
This patch imports the Linux kernel base board imx7d-pico.dtsi, pi board imx7d-pico-pi.dts and hobbit board imx7d-pico-hobbit.dts from Linux v5.1-rc1. Signed-off-by: Joris Offouga <offougajoris@gmail.com>
2019-04-25ARM: dts: colibri-imx6ull: fix uart-has-rtscts propertyMarcel Ziswiler
Remove vendor pre-fix fsl, from uart-has-rtscts property. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25colibri-imx6ull: migrate fec to using driver modelMarcel Ziswiler
Migrate Ethernet FEC to using driver model. Drop PHY_MICREL_KSZ90X1 which slipped in from Apalis iMX6. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25colibri-imx6ull: migrate usb to using driver modelMarcel Ziswiler
Migrate USB to using driver model. Add USBH_PEN GPIO regulator. While at it also add alias e.g. as required for UMS. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2019-04-25colibri-imx6ull: migrate mmc to using driver modelMarcel Ziswiler
Migrate MMC to using driver model. Migrate USDHC to using pinctrl. While at it also add GPIO1_IO03__OSC32K_32K_OUT pin muxing. While at it also update copyright period. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
generated by cgit (git 2.34.1) at 2024-12-29 18:12:58 +0000