Age | Commit message (Collapse) | Author |
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SPL/TPL share the same secure_timer_init(), update to use
one copy source code and update to use CONFIG_ROCKCHIP_STIMER_BASE
as base address and rename to function name to rockchip_stimer_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use common tpl.c instead of rk3368-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use Common tpl.c instead of rk3288-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use Common tpl.c instead of rk322x-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
common board is a basic TPL board init which can be shared for most
of SoCs to avoid copy-pase for different SoCs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Default to use ARM generic timer in ARM64, switch from
rk timer to generic timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Default to use ARM generic timer in ARM64, switch from
rk timer to generic timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Add stimer_init() for spl/tpl so that we able to switch
to use arch timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The SoC related init will move to SPL and keep TPL clean,
so that we can reuse the common TPL board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We have convert all SoC to use DM timer or ARM arch/generic
timer, we can remove this rk_timer now.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The timer.h is no use any more, remove it from the board files.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track the boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use system api for udelay instead of vendor defined api,
and rockchip_udelay() will be removed.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We share the same default SPL boot order for all rk3288 boards,
use dts instead of hard code in board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The fdt interfaces are actuall depends on OF_LIBFDT instead
of OF_CONTROL, some boards may enable OF_CONTROL while disable
OF_LIBFDT.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The rk3288-firefly board have different setting for sdmmc
io, sync then from kernel mainline:
6fbc7275c7a9 Linux 5.2-rc7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Enable TPL for evb-rk3288 so that we can have a free size limited
SPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We share the same TPL_LDSCRIPT for all rk3288 board, add
default value in Kconfig.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The configure_l2ctlr() is used only by rk3288, do not need to
locate in sys_proto.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Add arch_cpu_init() in SPL for soc related init, and
move configure_l2ctlr() into it.
The arch_cpu_init() only need to run once, so no need
to run in TPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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There is no difference in rk3368 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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There is no difference in rk3328 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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There is no difference in rk3399 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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There is no difference in rk3288 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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There is no difference in rk322x board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Rockchip SoCs have different ROCKCHIP_BOOT_MODE_REG value,
move it to SoC's own Kconfig, and add address for rk3128 and
rk3328 so that all SoCs have available address.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Kconfig for board target select is choice option, fixup for
rk3036, rk3288 and rv1108.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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No code is using this header file, remove it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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Use LPDDR4-100 sdram timings dtsi for RockPI-4 board.
All these timings are processed during TPL stage of rock-pi-4 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
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Use DDR3-1866 2GB ddr timings dtsi for 1GB NanoPi Neo4 board.
Since sdram rk3399 support dynamic stride and rank detection it
can able to detect 1GB ddr eventough the timings are meant for
dual channel, 2GB size.
Bootchain after and before this change are:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
This certainly fix the second channel data training initialization
since we have dynamic rank, stride where second channel capabilities
are clear or memset to 0.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
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Use LPDDR4-100 sdram timings dtsi for Rockpro64 board.
All these timings are processed during TPL stage of rockpro64 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
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