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2018-11-16armv7r: dts: am654: Add initial supportLokesh Vutla
Add R5 specific dts for am654-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-16arm: dts: k3: Sync dts from LinuxLokesh Vutla
Sync the k3-am654 specific dts files from Linux next with tag 20181019. This changes are in queue for Linux v4.20-rc1 Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support to start ATF from R5 SPLLokesh Vutla
Considering the boot time requirements, Cortex-A core should be able to start immediately after SPL on R5. Add support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16armv7R: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefiles to generate: - tiboot3.bin: Image format that can be processed by ROM. Below is the tiboot3.bin image format that is required by ROM: _______________________ | X509 | | Certificate | | ____________________ | | | | | | | u-boot-spl.bin | | | | | | | |___________________| | |_______________________| Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-16armv7R: K3: am654: Enable MPU regionsLokesh Vutla
Enable MPU regions for AM654 evm: - Region0: 0x00000000 - 0xFFFFFFFF: Device memory, not executable - Region1: 0x41c00000 - 0x42400000: Normal, executable, WB, Write alloc - Region2: 0x80000000 - 0xFFFFFFFF: Normal, executable, WB, Write alloc - region3-15: Disabled With this dcache can be enabled either in SPL or U-Boot. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-16ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-16arm: Make arch specific memcpy thumb-safe.Klaus Goger
The current arch implementation of memcpy cannot be called from thumb code, because it does not use bx instructions on return. This patch addresses that. Note, that this patch does not touch the hot loop of memcpy, so performance is not affected. Tested on MXS (arm926ejs) with and without thumb-mode enabled. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
2018-11-16ARM: DTS: Resync am3517-evm.dts with Linux 4.19Adam Ford
Some minor changes have been made to the AM3517-evm and the underlying am3517.dtsi files. This patch re-sync's the DTS and DTSI files with Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-11-16bcm968580xref: add initial supportPhilippe Reynes
This add the initial support of the broadcom reference board bcm968580xref with a bcm6858 SoC. This board has 512 MB of ram, 256 MB of flash (nand), 2 usb port, 1 uart, 4 ethernet ports (LAN), 1 ethernet port (WAN). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16bcm6858: add initial supportPhilippe Reynes
This add the initial support of the broadcom bcm6858 SoC family, only the cpu, dram and uart are supported. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16arm: at91: wdt: Convert watchdog driver to dm/dtPrasanthi Chellakumar
Convert the Watchdog driver for AT91SAM9x processors to support the driver model and device tree. Changes "CONFIG_AT91SAM9_WATCHDOG" to new "CONFIG_WDT_AT91" Kconfig option. Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
2018-11-16ARMv8: SError exception handling in PSCI exception vectorsChee Hong Ang
Allow platform vendors to handle SError interrupt exceptions from ARMv8 PSCI exception vectors by overriding this weak function 'plat_error_handler'. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16ARMv8: Add EL3 exception handling for ARMv8's KconfigChee Hong Ang
Kconfig option to allow all External Abort and SError exception taken to EL3. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16ARMv8: Enable all asynchronous abort exceptions taken to EL3Chee Hong Ang
Allow EL3 to handle all the External Abort and SError interrupt exception occur in all exception levels. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
2018-11-16Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dmTom Rini
- virtio implementation and supporting patches - DM_FLAG_PRE_RELOC fixes - regmap improvements - minor buildman and sandbox things
2018-11-14Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-11-14arm: stm32mp: Remove DM_FLAG_PRE_RELOC flagBin Meng
When a driver declares DM_FLAG_PRE_RELOC flag, it wishes to be bound before relocation. However due to a bug in the DM core, the flag only takes effect when devices are statically declared via U_BOOT_DEVICE(). This bug has been fixed recently by commit "dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()", but with the fix, it has a side effect that all existing drivers that declared DM_FLAG_PRE_RELOC flag will be bound before relocation now. This may expose potential boot failure on some boards due to insufficient memory during the pre-relocation stage. To mitigate this potential impact, the following changes are implemented: - Remove DM_FLAG_PRE_RELOC flag in the driver, if the driver only supports configuration from device tree (OF_CONTROL) - Keep DM_FLAG_PRE_RELOC flag in the driver only if the device is statically declared via U_BOOT_DEVICE() - Surround DM_FLAG_PRE_RELOC flag with OF_CONTROL check, for drivers that support both statically declared devices and configuration from device tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-14arm: qemu: Add a Kconfig in the board directoryBin Meng
This adds a Kconfig file in the board directory, so that some board-specific options can be specified there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14Merge branch 'next'Tom Rini
This brings in the u-boot-net PR from Joe.
2018-11-13sunxi: use 6MHz PLL_VIDEO step for DE2 for higher resolution LCDIcenowy Zheng
DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't let PLL_VIDEO be high enough for them. Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-13board: allwinner: sun50i-h6: Add Orangepi Lite2 supportJagan Teki
OrangePi Lite2 is Allwinner H6 based open-source SBC, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB LPDDR3 RAM - AXP805 PMIC - AP6356S Wifi/BT - USB 2.0, USB 3.0 Host, OTG - HDMI port - 5V/2A DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-13arm64: allwinner: h6: Add common orangepi nodes into dtsiJagan Teki
Based on the information from hardware schematics and orangepi vendor orangepi H6 boards, One Plus and Lite2 shares common nodes like axp805, uart, mmc0 etc. The common differences between them is - One Plus, has Ethernet - Lite2, has Wifi, USB3, CSI port. So, add common orangepi nodes into sun50i-h6-orangepi.dtsi so-that it case use on respective orangepi h6 board dts files. Cc: zhaoyifan <zhao_steven@263.net> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-13sunxi: DT: add support for PinebookVasily Khoruzhick
Pinebook is a laptop produced by Pine64, with USB-connected keyboard, USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP bridge from Analogix. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sun50i: A64: add support for R_I2C controllerVasily Khoruzhick
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C. Add support for this I2C controller and the pinmux which doesn't conflict with RSB. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Vagrant Cascadian <vagrant@debian.org> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-13mmc: sunxi: add support for automatic delay calibrationVasily Khoruzhick
A64 and H6 support automatic delay calibration and Linux driver uses it instead of hardcoded delays. Add support for it to u-boot driver. Fixes eMMC instability on Pinebook Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cc: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sunxi: A64: Add Pine64-LTS boardAndre Przywara
The Pine64 LTS is an updated version of the Pine64, copying the technical updates from the SoPine platform: LPDDR3 DRAM, eMMC socket and soldered SPI flash chip, even the broken SD card detect pin has been copied. Consequently this leads to the .dts (copied from the kernel) just including the SoPine baseboard .dts, and the defconfig being almost identical. Nevertheless the boards deserves a separate config. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sunxi: H3/H5: Update .dts filesAndre Przywara
Update the .dts/.dtsi files from the Linux sunxi/dt64-for-4.20 tree: commit 679294497be31596e1c9c61507746d72b6b05f26 Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz> Date: Wed Sep 26 19:48:24 2018 +0000 arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sunxi: A64: Re-add syscon to DT nodeAndre Przywara
The sun50i-a64.dtsi changes introduced in Linux v4.19-rc1 changed the compatible name for the syscon controller, dropping the generic "syscon" fallback. Using this new DT node will make the Ethernet driver in every older kernel (or non-Linux kernels) fail to initialise the MAC device. To allow booting distribution kernels (from installer images via UEFI, for instance), re-add the syscon compatible string as a fallback. This works with both older and newer kernels. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sunxi: A64: Update .dts/.dtsi filesAndre Przywara
Update the .dts/.dtsi file from the Linux sunxi/dt64-for-4.20 tree: commit 679294497be31596e1c9c61507746d72b6b05f26 Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz> Date: Wed Sep 26 19:48:24 2018 +0000 arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13sunxi: Imply fitImage supportMarek Vasut
Enable modern fitImage format on sunxi. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-12imx: mkimage: add size check to the u-boot.imx make targetMarcel Ziswiler
The make macro to check if the binary exceeds the board size limit is taken straight from the root Makefile. Without this and e.g. enabled EFI Vybrid fails booting as the regular size limit check does not take the final u-boot.imx binary size into account which is bigger due to alignment as well as IMX header stuff. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-11-08imx: imx6: perform gpr_init only on suitable cpu typesChristoph Niedermaier
If the function gpr_init is used in a common MX6 spl implementation we have to ensure that it is only called for suitable cpu types, otherwise it breaks hardware parts like enet1, can1, can2, etc. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
2018-11-06Merge tag 'u-boot-imx-20181106' of git://git.denx.de/u-boot-imxTom Rini
Fix coverity issues for i.MX8
2018-11-06arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGAStefan Roese
The new board version has the 2nd FPGA connected via CS# 0 instead of 2 on SPI bus 1. Change this setup in the DT accordingly. Please note that this change does still work on the old board version because the CS signal is not used on this board. Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-06arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible propertyStefan Roese
Add the "spi-flash" compatible string so that the generic sf_probe driver can probe the SPI flash on the theadorable Armada-XP board. Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-06arm: mvebu: Move PCI(e) MBUS window to end of RAMStefan Roese
With patch 49b23e035d96 (pci: mvebu: Increase size of PCIe default mapping) the mapping size for each PCI(e) controller was increased from 32MiB to 128MiB. This leads to problems on boards with multiple PCIe slots / ports which are unable to map all PCIe ports, e.g. the Armada-XP theadorable: DRAM: 2 GiB (667 MHz, 64-bit, ECC not enabled) SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB Cannot add window '4:f8', conflicts with another window PCIe unable to add mbus window for mem at f0000000+08000000 Model: Marvell Armada XP theadorable This patch moves the base address for the PCI(e) memory spaces from 0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now). This gives move room and flexibility for PCI(e) mappings. Signed-off-by: Stefan Roese <sr@denx.de> Cc: VlaoMao <vlaomao@gmail.com> Tested-by: VlaoMao <vlaomao at gmail.com>
2018-11-06ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"Fabio Estevam
Commit 3c28576bb0f0 ("arm: dts: imx8qxp: fix build warining") fixed the dts warning by removing the unnecessary #address-cells/#size-cells, but the recommendation for regulators is not to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator accordingly. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2018-11-05driver: net: ti: keystone_net: switch to use common mdio libGrygorii Strashko
Update TI Keystone 2 driver to re-use common mdio lib. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05drivers: net: keystone_net: drop non dm codeGrygorii Strashko
Networking support for all TI K2 boards converted to use DM model and CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop unused non DM K2 networking code. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05driver: net: consolidate ti's code in separate folderGrygorii Strashko
Add drivers/net/ti/ folder and move all TI's code in this folder for better maintenance. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-05aspeed: Activate ethernet devices on the ast2500 Eval BoardCédric Le Goater
Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-05aspeed: Update ast2500 SoC DTS file to Linux v4.17-rc6 levelCédric Le Goater
This is a large update of the AST2500 SoC DTS file bringing it to the level of commit 927c2fc2db19 : Author: Joel Stanley <joel@jms.id.au> Date: Sat Jun 2 01:18:53 2018 -0700 ARM: dts: aspeed: Fix hwrng register address There are some differences on the compatibility property names. scu, reset and clock drivers are also different. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-11-02ARM: rmobile: Generate fitting mem_map on Gen3Marek Vasut
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire 64bit DRAM space as cachable. On CortexA57, this might result in odd side effects, where the CPU tries to prefetch from those areas and if there is no DRAM backing them, CPU bus hang can happen. This patch fixes it by generating the mem_map structure based on the actual memory layout obtained from the DT, thus not marking areas without any DRAM behind them as cachable. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Fixes: c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3") Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-31sunxi: add support for Banana Pi M2 Zero boardJun Nie
Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one powering-only) and a miniHDMI port. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> [jagan: Fixed board MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-31arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITIONSimon Goldschmidt
Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of select ensures we can build without partition support (used to build a network boot only version of SPL and U-Boot). Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-29Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-10-29sunxi: store DRAM size in SPL headerAndre Przywara
At the moment we rely on the infamous get_ram_size() function to learn the actual DRAM size in U-Boot proper. This function has two issues: 1) It only works if the DRAM size is a power of two. We start to see boards which have 3GB of (usable) DRAM, so this does not fit anymore. 2) As U-Boot has no notion of reserved memory so far, it will happily ride through the DRAM, possibly stepping on secure-only memory. This could be a region of DRAM reserved for OP-TEE or some other secure payload, for instance. It will most likely crash in that case. As the SPL DRAM init routine has very accurate knowledge of the actual DRAM size, lets propagate this wisdom to U-Boot proper. We re-purpose a currently reserved word in our SPL header for that. The SPL itself stores the detected DRAM size there, and bumps the SPL header version number in that case. U-Boot proper checks for a valid SPL header and a high enough version number, then uses the DRAM size from there. If the SPL header field is not sufficient, we fall back to the old DRAM scanning routine. Part of the DRAM might be present and probed by SPL, but not accessible by the CPU. They're restricted in the main U-Boot binary, when accessing the DRAM size from SPL header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: add Kconfig option for the maximum accessible DRAMIcenowy Zheng
Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is accessible. Add a Kconfig option for the maximum accessible DRAM. For A80 it should be a much higher value (8GiB), but as I have no A80 device to test and originally U-Boot only supports 2GiB DRAM on A80, it currently still falls under the 2GiB situation. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: map DRAM part with 3G sizeIcenowy Zheng
All Allwinner 64-bit SoCs now are known to be able to access 3GiB of external DRAM, however the size of DRAM part in the MMU translation table is still 2GiB. Change the size of DRAM part in MMU table to 3GiB. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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