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2019-11-25Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-bootTom Rini
- add RPi4 upstream compatible to pinctrl - fix boot banner on RPi3/4 - add support for one binary on RPi3/4
2019-11-24ARM: defconfig: add unified config for RPi3 and RPi4Matthias Brugger
Provide a defconfig which allows us to boot Raspberrry Pi 4 and Raspberry Pi 3 Model B/B+ Instead of using the embedded DTB as done in RPi3 we use the devicetree provided by the firmware. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Set memory map at run-timeMatthias Brugger
For bcm283x based on arm64 we also have to change the mm_region. Add assign this in mach_cpu_init() so we can create now one binary for RPi3 and RPi4. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Set rpi_bcm283x_base at run-timeMatthias Brugger
As part of the effort to create one binary for several bcm83x SoCs we read the IO base address from device-tree. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24ARM: bcm283x: Move BCM283x_BASE to a global variableMatthias Brugger
We move the per SOC define BCM283x_BASE to a global variable. This is a first step to provide a single binary for several bcm283x SoCs. Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24arm: dts: bcm283x: Rename U-Boot fileMatthias Brugger
Rename the file bcm283x-uboot.dtsi so that it get automatically include through the scripts/Makefile.lib using $(CONFIG_SYS_SOC))-u-boot.dtsi Without this uarts and pincontroller miss the property dm-pre-reloc and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails as the pins are not set correctly. As a result the U-Boot banner isn't shown on boot. Before commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we included bcm283x-uboot.dtsi directly in the device-tree file. Which got deleted by the metioned commit. This is a much robuster solution. Reported-by: Tom Rini <trini@konsulko.com> Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24fdt: fix bcm283x dm-pre-reloc definitionsMatthias Brugger
In commmit 143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state") we deleted the label for the node soc from bcm283x.dtsi As we don't need to add the property dm-pre-reloc to the soc node, we can delete it from bcm283x-uboot.dtsi Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-23Merge tag 'u-boot-rockchip-20191124' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Clean vid/pid in Kconfig and add fastboot for rk3399 - add 'u-boot, spl-fifo-mode' for mmc - Use FIT generator for rk3229 optee and rk3368 ATF - fan53555: add support for Silergy SYR82X and SYR83X
2019-11-23arm: fix -march for ARM11Heinrich Schuchardt
In GCC 9 support for the Armv5 and Armv5E architectures (which have no known implementations) has been removed, cf. https://gcc.gnu.org/gcc-9/changes.html ARM11 is an armv6 implementation. So change the architecture flag for the compiler to armv6 for ARM11. Suggested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-11-23rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evbHeiko Stuebner
As part of loading trustedfirmware, the SPL is required to place portions of code into the socs sram but the mmc controllers can only do dma transfers into the regular memory, not sram. The results of this are not directly visible in u-boot itself, but manifest as security-relate cpu aborts during boot of for example Linux. There were a number of attempts to solve this elegantly but so far discussion is still ongoing, so to make the board at least boot correctly put both mmc controllers into fifo-mode, which also circumvents the issue for now. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-11-23rockchip: Setup dwc3_device (for non-dm gadgets)Jagan Teki
Setup dwc3_device structure for non-dm gadgets, which is used in rk3399 platforms. dwc3_device would have basic regbase, dr_mode, high speed and 16-bit UTMI+ etc. Cc: Marek Vasut <marex@denx.de> Tested-by: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-23rockchip: Convert to use FIT generator for opteeKever Yang
Use generator script so that we can use environment for TEE source. $TEE for tee.bin, and if file not exist, the script can report a warning, and meke the build success without a error. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-22Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
- Assorted fixes
2019-11-22Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- Assorted Gen3 fixes
2019-11-22arm: socfpga: stratix10: Add alias for gmac0 in S10 dtsOoi, Joyce
Add 'ethernet0' as alias for 'gmac0' in S10 device tree. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-22arm: dts: Stratix10: change pad skew values for EMAC0 PHY driverOoi, Joyce
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA drive strength has caused CE test to fail. This requires changes on the pad skew for EMAC0 PHY driver. Based on several measurements done, Tx clock does not require the extra 0.96ns delay which was needed in Arria10. Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-20env: Finish migration of common ENV optionsTom Rini
- In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-20socfpga: fix include guard in misc.h (arch vs. global)Simon Goldschmidt
The file arch/arm/mach-socfpga/include/mach/misc.h used the same include guard as the global include/misc.h. Fix this by giving the arch file an arch prefix. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-20arm: dts: Stratix10: Fix memory node address and size cellsLey Foon Tan
Add #address-cells and #size-cells to memory node to fix incorrect memory size decoding in recent Uboot version. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-19arm: arm11: allow unaligned memory accessHeinrich Schuchardt
The UEFI spec mandates that unaligned memory access should be enabled if supported by the CPU architecture. This patch implements the function unaligned_access() to set the enable unaligned data support flag and to clear the aligned flag in the system control register (SCTLR). It is called when UEFI related commands like bootefi are invoked. Reported-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Tested-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Tested-by: Guillaume Gardet <Guillaume.Gardet@arm.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-11-18Merge tag 'video-for-v2020.01-rc2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix i.MX6ULL evk black screen observed while reboot stress tests - remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree differences between Linux and U-Boot for stm32mp1 platform
2019-11-17Merge tag 'u-boot-rockchip-20191118' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip SoC: PX30, RK3308 - Add and migrate to use common dram driver: PX30, RK3328, RK3399 - Add rk3399 board Tinker-s support - Board config update for Rock960, Rockpro64
2019-11-17rockchip: dts: tinker: Add tinker-s board supportMichael Trimarchi
Support tinker-s board. The board is equivalent of tinker board except of emmc. TODO: - support of usb current burst when the board is powered from pc Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: tinker: Move u-boot dmc initialization to specific sectionMichael Trimarchi
dmc is used to initialize the memory controller. It's needed by u-boot. Move it in the specific section Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: imply instead of selecting SPL_SYS_MALLOC_SIMPLEThomas Hebb
We shouldn't force which allocator the SPL uses, since there's no platform requirement for one over the other: in fact, we currently allow selection of the TPL allocator but not the SPL one! Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: allow DRAM init in SPLThomas Hebb
The common SPL removed SoC-specific code for RK3399's SPL and in the process caused the previously-unconditional DRAM initialization in board_init_f() to only happen when compiling a configuration that does not support TPL, meaning DRAM never gets initialized if TPL is supported but disabled. Fix this by omitting the DRAM init in SPL only when we are configured to also build a TPL. This fixes custom configurations that have disabled TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399", and "chromebook_bob" defconfigs, although since I don't have any of those devices I can't confirm they're broken now. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: SPL: fix ordering of DRAM initThomas Hebb
The common SPL code reordered the DRAM initialization before rockchip_stimer_init(), which as far as I can tell causes the RK3399 to lock up completely. Fix this issue in the common code by putting the DRAM init back after timer init. I have only tested this on the RK3399, but it wouldn't make any sense for the timer init to require DRAM be set up on any system. Fixes: b7abef2ecbcc ("rockchip: rk3399: Migrate to use common spl board file") Signed-off-by: Thomas Hebb <tommyhebb@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3308: Add support for ROC-RK3308-CC boardAndy Yan
ROC-RK3308-CC is a rk3308 based board designed by Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi on board. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3308: Add dts for ROC-RK3308-CCAndy Yan
Add dts file for ROC-RK3308-CC from firefly. Sync form linux rockchip for v5.5-armsoc/dts64: "arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc" (sha1: 4403e1237be3af0977aa23ef399e3496316317a0) Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17board: rockchip: Add rk3308 evb supportAndy Yan
Add support for rk3308 evaluation board. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rockchip: Add dts for rk3308 evbAndy Yan
Add dts for rk3308 evb, sync from the linux kernel upstream list [0]. [0]https://patchwork.kernel.org/patch/11201555/ Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: rockchip: Add RK3308 SOC supportAndy Yan
RK3308 is a quad Cortex A35 based SOC with rich audio interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which designed for intelligent voice interaction and audio input/output processing. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: pll: add common pll setting funcsElaine Zhang
Common PLL setup function, compatible with different SOC. Mainly for the subsequent new SOC use. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: orangepi: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: khadas-edge: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: rock-pi4: Add init value for vdd_logKever Yang
We should set the init value when vdd_log is enabled, or else the vdd_log output voltage may not in soc required range. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm64: dts: rk3399-rock960: add vdd_log and its init valueKever Yang
Add vdd_log node according to rock960 schematic V13. This patch affect two boards: - Rock960 Model A - Ficus Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-11-17rockchip: dts: rk3399-firefly: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399-evb: move u-boot, spl-boot-order to to the u-boot.dtsiPeter Robinson
The u-boot specific device tree directives should be in u-boot.dtsi Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: dts: rk3399: move the u-boot, dm-pre-reloc to the u-boot.dtsiPeter Robinson
The u-boot specific pieces in the dts files should be in u-boot.dtsi not the main files, this allows easier sync with upstream. The rk3399.dtsi has a mix of both so move them all for consistency. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Fix with missing pmugrf) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: rk3399: split rockpro64 out of evb_rk3399Vasily Khoruzhick
rockpro64 needs to setup I/O domains in order for USB to work in u-boot. Since we currently don't have a driver to do that, split it into its own board file and initialize I/O domains here. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: clk: rv1108: remove duplicate reset initHeiko Stuebner
rockchip_reset_bind() already does the needed init for the reset registers, only referenced the wrong cru structure. So we can get rid of the open-coded reset init and just fix the correct cru reference. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: slightly increase center voltageSoeren Moch
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage scaling. So the regulator reset voltage of 0.9V is used on this board. Let u-boot initialize the center voltage to 0.95V as it is done for the VD_LOGIC domain. This avoids instability and occasional linux kernel Opses on this board. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-rockpro64: sync dts from linux kernelSoeren Moch
The most important change for u-boot is the fix for the vdd-log pwm voltage regulator to avoid overvoltage for the VD_LOGIC power domain. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17arm: dts: rk3399-roc-pc: Sync latest dts changes from LinuxJagan Teki
Few important regulator power rails fixes are available in linux-next, so sync them same. Here is the last commit details: commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts: rockchip: Fix roc-rk3399-pc regulator input rails") Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Levin Du <djw@t-chip.com.cn> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: Init driver otg_data for rk3288 usb phyKever Yang
RK3288 needs to init the otg_data in board level to make the phy driver work. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: usb: Migrate to use ofnodeKever Yang
Migrate to use ofnode_* instead of fdt_* so that we may able to use live dt for usb udc driver. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 architecture coreHeiko Stuebner
Add core architecture code to support the px30 soc. This includes a separate tpl board file due to very limited sram size as well as a non-dm sdram driver, as this also has to fit into the tiny sram. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: add px30 devicetreesHeiko Stuebner
Add px30 related devicetrees synced from the Linux kernel. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17rockchip: misc: read cpuid either from efuse or otpHeiko Stuebner
Newer Rockchip socs use a different ip block to handle one-time- programmable memory, so depending on what got enabled get the cpuid from either source. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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