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path: root/arch/riscv/cpu/fu540
AgeCommit message (Expand)Author
2020-08-25riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng
2020-08-14riscv: sifive: fu540: redundant initializationHeinrich Schuchardt
2020-08-14riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC levelBin Meng
2020-08-14riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng
2020-07-24env: Enable SPI flash env for SiFive FU540Jagan Teki
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel
2020-06-04riscv: sifive: fu540: add SPL configurationPragnesh Patel
2020-06-04riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel