Age | Commit message (Expand) | Author |
---|---|---|
2020-08-25 | riscv: fu540: Use correct API to get L2 cache controller base address | Bin Meng |
2020-08-14 | riscv: sifive: fu540: redundant initialization | Heinrich Schuchardt |
2020-08-14 | riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level | Bin Meng |
2020-08-14 | riscv: sifive/fu540: spl: Rename soc_spl_init() | Bin Meng |
2020-07-24 | env: Enable SPI flash env for SiFive FU540 | Jagan Teki |
2020-07-03 | riscv: sifive: fu540: enable all cache ways from U-Boot proper | Pragnesh Patel |
2020-06-04 | riscv: sifive: fu540: add SPL configuration | Pragnesh Patel |
2020-06-04 | riscv: cpu: fu540: Add support for cpu fu540 | Pragnesh Patel |