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path: root/arch/riscv/include/asm
AgeCommit message (Expand)Author
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen
2018-11-26riscv: do not reimplement generic io functionsLukas Auer
2018-11-26riscv: make use of the barrier functions from LinuxLukas Auer
2018-11-26riscv: fix use of incorrectly sized variablesLukas Auer
2018-11-20Use _AC and UL macros from linux/const.hBaruch Siach
2018-10-03riscv: Remove CSR read/write defines in encoding.hBin Meng
2018-10-03riscv: Add a helper routine to print CPU informationBin Meng
2018-10-03riscv: Remove mach typeBin Meng
2018-10-03riscv: Remove setup.hBin Meng
2018-09-10arch: types.h: factor out fixed width typedefs to int-ll64.hMasahiro Yamada
2018-05-29riscv: cpu: nx25: Rename as ax25Rick Chen
2018-05-29SPDX: Convert single license tags to Linux Kernel styleRick Chen
2018-05-29riscv: Add board_quiesce_devices stubAlexander Graf
2018-05-29riscv: Add setjmp/longjmp codeAlexander Graf
2018-05-15riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue
2018-05-15riscv: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2018-03-30riscv: bootm: Remove ATAGSRick Chen
2018-03-30riscv: checkpatch: Fix alignment should match open parenthesisRick Chen
2018-03-30riscv: checkpatch: Fix use of volatileRick Chen
2018-03-30riscv: checkpatch: Fix Macro argument reuseRick Chen
2018-01-12riscv: nx25: include: Add header files to support RISC-VRick Chen