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path: root/arch/x86/cpu/queensbay
AgeCommit message (Expand)Author
2015-07-28x86: Convert to use driver model pci on queensbay/crownbayBin Meng
2015-07-14x86: queensbay: Change CPU_ADDR_BITS to 32Bin Meng
2015-07-14x86: queensbay: Change PCIe root ports' interrupt routingBin Meng
2015-06-04x86: Refactor PIRQ routing supportBin Meng
2015-04-29x86: queensbay: Implement PIRQ routingBin Meng
2015-04-29x86: queensbay: Avoid using PCH prefixBin Meng
2015-04-16x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass
2015-02-06x86: Allow FSP Kconfig settings for all x86Simon Glass
2015-02-06x86: mmc: Move common FSP functions into a common fileSimon Glass
2015-02-05x86: Make CAR and DRAM FSP code commonSimon Glass
2015-02-05x86: Move common FSP code into a common locationSimon Glass
2015-01-13x86: fsp: Drop get_hob_type() and get_hob_length()Bin Meng
2015-01-12x86: Simplify the fsp hob access functionsBin Meng
2014-12-18x86: Clean up the FSP support codesBin Meng
2014-12-18x86: crownbay: Add SDHCI supportBin Meng
2014-12-18x86: crownbay: Add SPI flash supportBin Meng
2014-12-18x86: Use consistent name XXX_ADDR for binary blob flash addressBin Meng
2014-12-18x86: Add queensbay and crownbay Kconfig filesBin Meng
2014-12-18x86: Convert microcode format to device-tree-onlySimon Glass
2014-12-18x86: Add basic support to queensbay platform and crownbay boardBin Meng
2014-12-13x86: queensbay: Adapt FSP support codesBin Meng
2014-12-13x86: Initial import from Intel FSP release for Queensbay platformBin Meng
generated by cgit (git 2.34.1) at 2024-12-28 06:09:30 +0000