Age | Commit message (Expand) | Author |
2014-12-18 | x86: Clean up the FSP support codes | Bin Meng |
2014-12-18 | x86: crownbay: Add SDHCI support | Bin Meng |
2014-12-18 | x86: crownbay: Add SPI flash support | Bin Meng |
2014-12-18 | x86: Use consistent name XXX_ADDR for binary blob flash address | Bin Meng |
2014-12-18 | x86: Add queensbay and crownbay Kconfig files | Bin Meng |
2014-12-18 | x86: Enable the queensbay cpu directory build | Bin Meng |
2014-12-18 | x86: Convert microcode format to device-tree-only | Simon Glass |
2014-12-18 | x86: Add basic support to queensbay platform and crownbay board | Bin Meng |
2014-12-18 | x86: Correct problems in the microcode loading | Simon Glass |
2014-12-18 | x86: ivybridge: Update the microcode | Simon Glass |
2014-12-13 | x86: Support Intel FSP initialization path in start.S | Bin Meng |
2014-12-13 | x86: Add post failure codes for bist and car | Bin Meng |
2014-12-13 | x86: queensbay: Adapt FSP support codes | Bin Meng |
2014-12-13 | x86: Initial import from Intel FSP release for Queensbay platform | Bin Meng |
2014-12-13 | x86: Clean up asm-offsets | Bin Meng |
2014-12-08 | Replace <compiler.h> with <linux/compiler.h> | Masahiro Yamada |
2014-11-25 | x86: Add initial video device init for Intel GMA | Simon Glass |
2014-11-25 | x86: Add GDT descriptors for option ROMs | Simon Glass |
2014-11-25 | x86: ivybridge: Add northbridge init functions | Simon Glass |
2014-11-25 | x86: Add init for model 206AX CPU | Simon Glass |
2014-11-25 | x86: Add LAPIC setup code | Simon Glass |
2014-11-25 | x86: Drop old CONFIG_INTEL_CORE_ARCH code | Simon Glass |
2014-11-25 | x86: Refactor interrupt_init() | Bin Meng |
2014-11-25 | x86: Remove cpu_init_r() for x86 | Bin Meng |
2014-11-25 | x86: Call cpu_init_interrupts() from interrupt_init() | Bin Meng |
2014-11-25 | x86: Add Intel speedstep and turbo mode code | Simon Glass |
2014-11-25 | x86: ivybridge: Set up XHCI USB | Simon Glass |
2014-11-25 | x86: ivybridge: Set up EHCI USB | Simon Glass |
2014-11-25 | x86: ivybridge: Add SATA init | Simon Glass |
2014-11-25 | x86: ivybridge: Add additional LPC init | Simon Glass |
2014-11-25 | x86: ivybridge: Add PCH init | Simon Glass |
2014-11-25 | x86: ivybridge: Add support for BD82x6x PCH | Simon Glass |
2014-11-25 | x86: pci: Add handlers before and after a PCI hose scan | Simon Glass |
2014-11-25 | x86: Factor out common values in the link script | Simon Glass |
2014-11-25 | x86: Ensure that all relocation data is included in the image | Simon Glass |
2014-11-25 | x86: Remove board_early_init_r() | Simon Glass |
2014-11-25 | x86: Add ivybridge directory to Makefile | Simon Glass |
2014-11-24 | Merge git://git.denx.de/u-boot-x86 | Tom Rini |
2014-11-23 | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory | Masahiro Yamada |
2014-11-23 | kbuild: Descend into SOC directory from CPU directory | Masahiro Yamada |
2014-11-23 | linux/kernel.h: sync min, max, min3, max3 macros with Linux | Masahiro Yamada |
2014-11-21 | x86: ivybridge: Implement SDRAM init | Simon Glass |
2014-11-21 | x86: ivybridge: Add LAPIC support | Simon Glass |
2014-11-21 | x86: Make show_boot_progress() common | Simon Glass |
2014-11-21 | x86: ivybridge: Add early init for PCH devices | Simon Glass |
2014-11-21 | x86: ivybridge: Perform Intel microcode update on boot | Simon Glass |
2014-11-21 | x86: ivybridge: Check BIST value on boot | Simon Glass |
2014-11-21 | x86: ivybridge: Perform initial CPU setup | Simon Glass |
2014-11-21 | x86: Tidy up coreboot header usage | Simon Glass |
2014-11-21 | x86: ivybridge: Add early LPC init so that serial works | Simon Glass |