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path: root/arch/x86/include/asm/arch-apollolake
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2020-02-04x86: Move itss.h from Apollo Lake to the generic x86 include directoryWolfgang Wallner
The code in this file is not specific to Apollo Lake. According to coreboot sources (where this code comes from), it is common to at least: * Apollo Lake * Cannon Lake * Ice Lake * Skylake Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04x86: apl: Add the term "Interrupt Timer Subsystem" to ITSS filesWolfgang Wallner
ITSS stands for "Interrupt Timer Subsystem", so add that term to the description of the relevant files. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add FSP structuresSimon Glass
These are mostly specific to a particular SoC. Add the definitions for Apollo Lake. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add a CPU driverSimon Glass
Add a bare-bones CPU driver so that CPUs can be probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add PCH driverSimon Glass
Add a driver for the Apollo Lake Platform Controller Hub. It does not have any functionality and is just a placeholder for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add LPC driverSimon Glass
This driver the LPC and provides a few functions to set up LPC features. These should probably use ioctls() or perhaps, better, have specific uclass methods. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add ITSS driverSimon Glass
This driver models some sort of interrupt thingy but there are so many abreviations that I cannot find out what it stands for. Possibly something to do with interrupts. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add systemagent driverSimon Glass
This driver handles communication with the systemagent which needs to be told when U-Boot has completed its init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add pinctrl driverSimon Glass
Add a driver for the Apollo Lake pinctrl. This mostly makes use of the common Intel pinctrl support. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add UART driverSimon Glass
Add a driver for the Apollo Lake UART. It uses the standard ns16550 device but also sets up the input clock with LPSS and supports configuration via of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add PMC driverSimon Glass
Add a driver for the Apollo Lake SoC. It supports the basic operations and can use device tree or of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15x86: apl: Add basic IO addressesSimon Glass
Add some fixed IO and mmap addresses for use in the device tree and with some early-init code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>