summaryrefslogtreecommitdiff
path: root/arch/x86/include
AgeCommit message (Expand)Author
2016-03-17x86: Add common SDRAM-init codeSimon Glass
2016-03-17x86: Move common PCH code into a common placeSimon Glass
2016-03-17x86: Add a function to set the IOAPIC IDSimon Glass
2016-03-17x86: broadwell: Add support for SDRAM setupSimon Glass
2016-03-17x86: broadwell: Add power-control supportSimon Glass
2016-03-17x86: broadwell: Add an LPC driverSimon Glass
2016-03-17x86: broadwell: Add a pinctrl driverSimon Glass
2016-03-17x86: broadwell: Add a PCH driverSimon Glass
2016-03-17x86: Add basic support for broadwellSimon Glass
2016-03-17x86: Add support for running Intel reference codeSimon Glass
2016-03-17x86: Drop all the old pin configuration codeSimon Glass
2016-03-17x86: Add an ICH6 pin configuration driverSimon Glass
2016-03-17x86: Update microcode for secondary CPUsSimon Glass
2016-03-17x86: Record the CPU details when starting each coreSimon Glass
2016-03-17x86: Allow I/O functions to use pointersSimon Glass
2016-03-17x86: Add macros to clear and set I/O bitsSimon Glass
2016-03-17x86: ivybridge: Drop sandybridge_early_init()Simon Glass
2016-03-17x86: Move Intel Management Engine code to a common placeSimon Glass
2016-03-17x86: Rename PORT_RESET to IO_PORT_RESETSimon Glass
2016-03-17x86: Move common CPU code to its own placeSimon Glass
2016-03-17x86: Move common LPC code to its own placeSimon Glass
2016-03-17x86: Add the root-complex block to common intel registersSimon Glass
2016-03-17x86: Create a common header for Intel register accessSimon Glass
2016-03-17x86: Move microcode code to a common locationSimon Glass
2016-03-17x86: cpu: Add functions to return the family and steppingSimon Glass
2016-03-17x86: Add comments to the SIPI vectorSimon Glass
2016-03-17x86: Correct duplicate POST valuesSimon Glass
2016-03-17x86: gpio: Correct GPIO setup orderingSimon Glass
2016-03-17x86: Add some more common MSR indexesSimon Glass
2016-03-17x86: Support booting SeaBIOSBin Meng
2016-03-17x86: Implement functions for writing coreboot tableBin Meng
2016-03-17x86: Change write_acpi_tables() signature a little bitBin Meng
2016-03-17x86: Use a macro for ROM table alignmentBin Meng
2016-03-17x86: Clean up coreboot_tables.hBin Meng
2016-03-17x86: Move sysinfo related to sysinfo.hBin Meng
2016-03-17x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng
2016-02-21x86: ivybridge: Add FSP supportBin Meng
2016-02-05x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLEBin Meng
2016-02-05x86: pci: Drop legacy PCI APIsBin Meng
2016-02-05x86: irq: Move irq_router to a per driver privBin Meng
2016-02-05x86: Drop asm/arch/gpio.hBin Meng
2016-01-28x86: qemu: add the ability to load and link ACPI tables from QEMUMiao Yan
2016-01-28x86: qemu: setup PM IO base for ACPI in southbridgeMiao Yan
2016-01-28x86: qemu: re-structure qemu_fwcfg_list_firmware()Miao Yan
2016-01-28x86: baytrail: Add option to disable the internal UART to setup_early_uart()Stefan Roese
2016-01-24x86: ivybridge: Use syscon for the GMA deviceSimon Glass
2016-01-24x86: Set up a shared syscon numbering schemaSimon Glass
2016-01-24x86: ivybridge: Drop XHCI supportSimon Glass
2016-01-24x86: ivybridge: Drop special EHCI initSimon Glass
2016-01-24x86: ivybridge: Sort out the calls to bridge_silicon_revision()Simon Glass
generated by cgit (git 2.34.1) at 2024-12-29 18:35:50 +0000