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2018-05-15x86: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2018-05-07SPDX: Convert all of our multiple license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have multiple licenses (in these cases, dual license) declared in the SPDX-License-Identifier tag. In this case we change from listing "LICENSE-A LICENSE-B" or "LICENSE-A or LICENSE-B" or "(LICENSE-A OR LICENSE-B)" to "LICENSE-A OR LICENSE-B" as per the Linux Kernel style document. Note that parenthesis are allowed so when they were used before we continue to use them. Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-16x86: Rename e820entry to e820_entryBin Meng
This changes 'struct e820entry' to 'struct e820_entry' to conform with the coding style. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16x86: Use 'unsigned int' in install_e820_map() functionsBin Meng
This fixes the following checkpatch warning: warning: Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-04-16x86: Update the io.h file to use {out|in}_{be|le}X macrosLukasz Majewski
The commit 3f70a6f57734 ("x86: Add clr/setbits functions") introduced the {read|write}_ macros to manipulate data. Those macros are not used by any code in the u-boot project (despite the io.h itself). Other architectures use io.h with {in|out}_* macros. This commit brings some unification across u-boot supported architectures. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-04-16x86: Add 64-bit memory-mapped I/O functionsIvan Gorinov
Add readq() and writeq() definitions for x86. Please note: in 32-bit code readq/writeq will generate two 32-bit memory access instructions instead of one atomic 64-bit operation. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-03-30x86: zImage: Pass working device tree data to the kernelIvan Gorinov
On x86 platforms, U-Boot does not pass Device Tree data to the kernel. This prevents the kernel from using FDT loaded by U-Boot. Read the working FDT address from the "fdtaddr" environment variable and add a copy of the FDT data to the kernel setup_data list. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30x86: acpi: Use an API to get the ACPI RSDP table addressBin Meng
At present the acpi_rsdp_addr variable is directly referenced in setup_zimage(). This changes to use an API for better encapsulation and extension. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parametersAndy Shevchenko
New field acpi_rsdp_addr, which has been introduced in boot protocol v2.14 [1], in boot parameters tells kernel the exact address of RDSP ACPI table. Knowing it increases robustness of the kernel by avoiding in some cases traversal through a part of physical memory. It will slightly reduce boot time by the same reason. [1] See Linux kernel commit 2f74cbf ("x86/boot: Add the ACPI RSDP address to struct setup_header::acpi_rdsp_addr") @ https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=2f74cbf for the details. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: updated the kernel commit git URL and fixed one style issue] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30x86: tangier: Make _CRS for BTH0 Serialized to avoid warningAndy Shevchenko
ASL compiler warns: ASL board/intel/edison/dsdt.asl board/intel/edison/dsdt.asl.tmp 238: Method (_CRS, 0, NotSerialized) Remark 2120 - Control Method should be made Serialized ^ (due to creation of named objects within) Do as suggested by ASL compiler. Fixes: 5d8c4ebd95e2 ("x86: tangier: Add Bluetooth to ACPI table") Reported-by: Ferry Toth <fntoth@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-08x86: tangier: Add Bluetooth to ACPI tableAndy Shevchenko
As defined on reference board followed by Intel Edison a Bluetooth device is attached to HSU0, i.e. PCI 0000:04.1. Describe it in ACPI accordingly. Note, we use BCM2E95 ID here as one most suitable for such device based on the description in commit message of commit 89ab37b489d1 ("Bluetooth: hci_bcm: Add support for BCM2E95 and BCM2E96") in the Linux kernel source tree. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-08x86: tangier: Use actual GPIO hardware numbersAndy Shevchenko
The recent commit 03c4749dd6c7 ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation") in the Linux kernel reveals the issue we have in ACPI tables here, i.e. we must use hardware numbers for GPIO resources and, taking into consideration that GPIO and pin control are *different* IPs on Intel Tangier, we need to supply numbers properly. Besides that, it improves user experience since the official documentation for Intel Edison board is referring to GPIO hardware numbering scheme. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-12-21x86: tangier: Use official ACPI HID for FLIS IPAndy Shevchenko
FLIS IP since now gets its own ACPI ID. Drop PRP0001 workaround in favour of official ACPI HID. Corresponding kernel commit dabd4bc6de2b pinctrl: intel: merrifield: Introduce ACPI device table in the pin control subsystem tree [1] targeting v4.16. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git/commit/?h=for-next&id=dabd4bc6de2b Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-10-27x86: acpi: Put sleepstates.asl to the common placeBin Meng
The supported sleep states are generic on Intel processors. Move the ASL definition to the common place. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-10-19x86: baytrail: fsp: Use a function to update the Azalia config pointerBin Meng
At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-19x86: fsp: Consolidate Azalia header fileBin Meng
So far there are two copies of Azalia struct defines with one in baytrail and the other one in braswell. This consolidates these two into one, put it in the common place, and remove the prefix pch_ to these structs to make their names more generic. This also corrects reset_wait_timer from us to ms. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2017-10-07x86: tangier: Enable ACPI support for Intel TangierAndy Shevchenko
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't utilize ACPI by default. Here is an attempt to unleash ACPI flexibility power on Intel Merrifield based platforms. The change brings minimum support of the devices that found on Intel Merrifield based end user device. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-10-02x86: Use asm-generic/io.hPaul Burton
Convert the x86 architecture to make use of the new asm-generic/io.h to provide address mapping functions. As the generic implementations are suitable for x86 this is primarily a matter of moving code. This has only been build-tested, feedback from architecture maintainers is welcome. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16dm: x86: Allow TSC timer to be used before DM is readySimon Glass
With bootstage we need access to the timer before driver model is set up. To handle this, put the required state in global_data and provide a new function to set up the device, separate from the driver's probe() method. This will be used by the 'early' timer also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-09-16x86: braswell: Add FSP configurationBin Meng
Add FSP related configuration for Braswell. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: Add Intel Braswell SoC supportBin Meng
This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: fsp: Update fsp command to show spec 1.1 headerBin Meng
FSP spec 1.1 adds 3 new APIs and their offsets are in the header. Update the 'fsp hdr' command to show these new entries. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: fsp: Add FSP_GRAPHICS_INFO_HOBBin Meng
This adds a new HOB type for graphics information introduced in FSP spec 1.1. When graphics capability is included in FSP and enabled, FSP produces an FSP_GRAPHICS_INFO_HOB as described in the EFI PI specification which provides information about the graphics mode and framebuffer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16x86: fsp: Update struct common_buf for FSP spec 1.1Bin Meng
FSP spec 1.1 adds one more member to the struct common_buf to determine the memory size that can be reserved by FSP below "top of low usable memory" for bootloader usage. This new member uses the reserved space so that it is still compatible with previous FSP spec 1.0. A new HOB (FSP_HOB_RESOURCE_OWNER_BOOTLOADER_TOLUM_GUID) is also published when common_buf.tolum_size is valid and non zero. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-12dma: import linux/dma-direction.h to consolidate enum dma_data_directionMasahiro Yamada
Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete duplicated definitions of enum dma_data_direction. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-08-08x86: Remove dead ISA related codesBin Meng
Neither new design uses ISA bus, nor does any U-Boot codes use these codes. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: kconfig: Select ARCH_EARLY_INIT_R in the platform KconfigBin Meng
This is architecture-dependent early initialization hence should be put in the platform Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01x86: Make table address selectableAndy Shevchenko
Some firmwares might have another window for generated tables. So, introduce two configuration options to select start address and maximum length for the generated tables. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Export acpi_fill_mcfg() with __weak attributeAndy Shevchenko
Some platforms might require different approach when filling memory mappings configuration table. Allow them to override the common method. At the same time export acpi_create_mcfg_mmconfig(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: acpi: Name fields in FADT in accordance with specificationAndy Shevchenko
ACPI specification defines FADT fields marked as reserved in U-Boot. Name these fields in accordance with ACPI specification. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-07-30x86: Add Intel Tangier supportFelipe Balbi
Add Intel Tangier SoC support. Intel Tangier SoC is a core part of Intel Merrifield platform. For example, Intel Edison board is based on such platform. The patch is based on work done by the following people (in alphabetical order): Aiden Park <aiden.park@intel.com> Dukjoon Jeon <dukjoon.jeon@intel.com> eric.park <eric.park@intel.com> Fabien Chereau <fabien.chereau@intel.com> Scott D Phillips <scott.d.phillips@intel.com> Sebastien Colleur <sebastienx.colleur@intel.com> Steve Sakoman <steve.sakoman@intel.com> Vincent Tinelli <vincent.tinelli@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-07-30x86: Add dma-mapping.h to architectural codeAndy Shevchenko
Some cross-platform drivers rely on this header present. Make it so for x86. It's just a copy'n'paste of arch/arm/include/asm/dma-mapping.h. Suggested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2017-06-05x86: Don't include asm/u-boot.h in commonSimon Glass
With a small fixup to u-boot-x86.h, this is not actually needed anywhere, so drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: Make u-boot-x86.h a private headerSimon Glass
Rather than including this arch-specific header file in common.h, include it from within x86's u-boot.h header. Also drop the comment about something to be fixed. It is not clear what needs fixing. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integerBin Meng
At present lpe/lpss-sio/scc FSP properties are all boolean, but in fact for "enable-lpe" it has 3 possible options. This adds macros for these options and change the property from a boolean type to an integer type, and change their names to explicitly indicate what the property is really for. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Use macros instead of magic numbers for FSP settingsBin Meng
Introduce various meaningful macros for FSP settings and switch over to use them instead of magic numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05x86: baytrail: Remove "serial-debug-port-*" settingsBin Meng
"serial-debug-port-address" and "serial-debug-port-type" settings are actually reserved in the FSP UPD data structure. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-17x86: acpi: Fix Windows S3 resume failureBin Meng
U-Boot sets up the real mode interrupt handler stubs starting from address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff) system memory is reported as system RAM in E820 table to the OS. (see install_e820_map() implementation for each platform). So OS can use these memories whatever it wants. If U-Boot is in an S3 resume path, care must be taken not to corrupt these memorie otherwise OS data gets lost. Testing shows that, on Microsoft Windows 10 on Intel Baytrail its wake up vector happens to be installed at the same address 0x1000. While on Linux its wake up vector does not overlap this memory range, but after resume kernel checks low memory range per config option CONFIG_X86_RESERVE_LOW which is 64K by default to see whether a memory corruption occurs during the suspend/resume (it's harmless, but warnings are shown in the kernel dmesg logs). We cannot simply mark the these memory as reserved in E820 table because such configuration makes GRUB complain: unable to allocate real mode page. Hence we choose to back up these memories to the place where we reserved on our stack for our S3 resume work. Before jumping to OS wake up vector, we need restore the original content there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: acpi: Refactor acpi_resume()Bin Meng
To do something more in acpi_resume() like turning on ACPI mode, we need locate ACPI FADT table pointer first. But currently this is done in acpi_find_wakeup_vector(). This changes acpi_resume() signature to accept ACPI FADT pointer as the parameter. A new API acpi_find_fadt() is introduced, and acpi_find_wakeup_vector() is updated to use FADT pointer as the parameter as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: acpi: Make enter_acpi_mode() publicBin Meng
enter_acpi_mode() is useful on other boot path like S3 resume, so make it public. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: fsp: Save stack address to CMOS for next S3 bootBin Meng
At the end of pre-relocation phase, save the new stack address to CMOS and use it as the stack on next S3 boot for fsp_init() continuation function. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: Add an early CMOS access libraryBin Meng
This adds a library that provides CMOS (inside RTC SRAM) access at a very early stage when driver model is not available yet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: acpi: Resume OS if resume vector is foundBin Meng
In an S3 resume path, U-Boot does everything like a cold boot except in the last_stage_init() it jumps to the OS resume vector. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: acpi: Add one API to find OS wakeup vectorBin Meng
This adds one API acpi_find_wakeup_vector() to locate OS wakeup vector from the ACPI FACS table, to be used in the S3 boot path. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: acpi: Add wake up assembly stubBin Meng
This adds a wake up stub before jumping to OS wake up vector. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: baytrail: Conditionally report S3 in the ACPI tableBin Meng
When U-Boot is built without ACPI S3 support, it should not report S3 in the ACPI table otherwise when kernel does STR it won't work. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: Store and display previous sleep stateBin Meng
Add one member in the global data to store previous sleep state, and display the state during boot in print_cpuinfo(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: fsp: acpi: Pass different boot mode to FSP initBin Meng
When ACPI S3 resume is turned on, we should pass different boot mode to FSP init instead of default BOOT_FULL_CONFIG. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
2017-05-17x86: Add post codes for OS resumeBin Meng
This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>