uboot-2021-rebase.git - uboot 2021 rebase, to fix booting on modern SD cards, from https://github.com/fifteenhex/u-boot/tree/am335x_som

Age	Commit message (Expand)	Author
2014-11-25	x86: Drop some msr functions that we don't support	Simon Glass
2014-11-25	x86: Add init for model 206AX CPU	Simon Glass
2014-11-25	x86: Add LAPIC setup code	Simon Glass
2014-11-25	x86: Drop old CONFIG_INTEL_CORE_ARCH code	Simon Glass
2014-11-25	x86: Refactor interrupt_init()	Bin Meng
2014-11-25	x86: Remove cpu_init_r() for x86	Bin Meng
2014-11-25	x86: Call cpu_init_interrupts() from interrupt_init()	Bin Meng
2014-11-25	x86: Add Intel speedstep and turbo mode code	Simon Glass
2014-11-25	x86: ivybridge: Set up XHCI USB	Simon Glass
2014-11-25	x86: ivybridge: Set up EHCI USB	Simon Glass
2014-11-25	x86: dts: Add SATA settings for link	Simon Glass
2014-11-25	x86: ivybridge: Add SATA init	Simon Glass
2014-11-25	x86: dts: Add LPC settings for link	Simon Glass
2014-11-25	x86: dts: Move PCI peripherals into a pci node	Simon Glass
2014-11-25	x86: ivybridge: Add additional LPC init	Simon Glass
2014-11-25	x86: ivybridge: Add PCH init	Simon Glass
2014-11-25	x86: Add a simple header file for ACPI	Simon Glass
2014-11-25	x86: ivybridge: Add support for BD82x6x PCH	Simon Glass
2014-11-25	x86: Set up edge triggering on interrupt 9	Simon Glass
2014-11-25	x86: pci: Add handlers before and after a PCI hose scan	Simon Glass
2014-11-25	x86: Add ioapic.h header	Simon Glass
2014-11-25	x86: Factor out common values in the link script	Simon Glass
2014-11-25	x86: Ensure that all relocation data is included in the image	Simon Glass
2014-11-25	x86: Panic if there is no relocation data	Simon Glass
2014-11-25	x86: Remove board_early_init_r()	Simon Glass
2014-11-25	x86: Add ivybridge directory to Makefile	Simon Glass
2014-11-24	Merge git://git.denx.de/u-boot-x86	Tom Rini
2014-11-23	x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directory	Masahiro Yamada
2014-11-23	kbuild: Descend into SOC directory from CPU directory	Masahiro Yamada
2014-11-23	linux/kernel.h: sync min, max, min3, max3 macros with Linux	Masahiro Yamada
2014-11-21	x86: Rename chromebook-x86 to coreboot	Simon Glass
2014-11-21	x86: ivybridge: Implement SDRAM init	Simon Glass
2014-11-21	x86: ivybridge: Add LAPIC support	Simon Glass
2014-11-21	x86: Make show_boot_progress() common	Simon Glass
2014-11-21	x86: chromebook_link: Enable GPIO support	Simon Glass
2014-11-21	x86: ivybridge: Add support for early GPIO init	Simon Glass
2014-11-21	x86: ivybridge: Add early init for PCH devices	Simon Glass
2014-11-21	x86: dts: Add microcode updates for ivybridge CPU	Simon Glass
2014-11-21	x86: ivybridge: Perform Intel microcode update on boot	Simon Glass
2014-11-21	x86: ivybridge: Check BIST value on boot	Simon Glass
2014-11-21	x86: ivybridge: Perform initial CPU setup	Simon Glass
2014-11-21	x86: Add msr read/write functions that use a structure	Simon Glass
2014-11-21	x86: Add clr/setbits functions	Simon Glass
2014-11-21	x86: Tidy up coreboot header usage	Simon Glass
2014-11-21	x86: ivybridge: Add early LPC init so that serial works	Simon Glass
2014-11-21	x86: pci: Allow configuration before relocation	Simon Glass
2014-11-21	x86: ivybridge: Enable PCI in early init	Simon Glass
2014-11-21	x86: Support use of PCI before relocation	Simon Glass
2014-11-21	x86: Refactor PCI to permit alternate init	Simon Glass
2014-11-21	x86: chromebook_link: Implement CAR support (cache as RAM)	Simon Glass