summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)Author
2016-11-30Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
2016-11-30MIPS: Fix map_physmem for cached mappingsPaul Burton
map_physmem should return a pointer that can be used by the CPU to access the given memory - on MIPS simply returning the physical address as it does prior to this patch doesn't achieve that. Instead return a pointer to the memory within (c)kseg0, which matches up consistently with the (c)kseg1 pointer that uncached mappings return via ioremap. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-11-30MIPS: Use ram_top, not bi_memsize, in arch_lmb_reservePaul Burton
When calculating the region to reserve for the stack in arch_lmb_reserve, make use of ram_top instead of adding bi_memsize to CONFIG_SYS_SDRAM_BASE. This avoids overflow if the system has enough memory to reach the end of the address space. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-11-30mips: Let cache.h be included from assembly sourceMarek Vasut
Add ifdef __ASSEMBLY__ around the function prototype to let cache.h be included from assembly code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com>
2016-11-30MIPS: add handling for generic and EJTAG exceptionsDaniel Schwierzeck
Add exception handlers for generic and EJTAG exceptions. Most of the assembly code is imported from Linux kernel and adapted to U-Boot. The exception vector table will be reserved above the stack before U-Boot is relocated. The exception handlers will be installed and activated after relocation in the initr_traps hook function. Generic exceptions are handled by showing a CPU register dump similar to Linux kernel. For example: malta # md 1 00000001: Ooops: $ 0 : 00000000 00000000 00000009 00000004 $ 4 : 8ff7e108 00000000 0000003a 00000000 $ 8 : 00000008 00000001 8ff7cd18 00000004 $12 : 00000002 00000000 00000005 0000003a $16 : 00000004 00000040 00000001 00000001 $20 : 00000000 8fff53c0 00000008 00000004 $24 : ffffffff 8ffdea44 $28 : 90001650 8ff7cd00 00000004 8ffe6818 Hi : 00000000 Lo : 00000004 epc : 8ffe6848 (text bfc28848) ra : 8ffe6818 (text bfc28818) Status: 00000006 Cause : 00000410 (ExcCode 04) BadVA : 8ff9e928 PrId : 00019300 ### ERROR ### Please RESET the board ### EJTAG exceptions are checked for SDBBP and delegated to the SDBBP handler if necessary. Otherwise the debug mode will simply be exited. The SDBBP handler currently prints the contents of registers c0_depc and c0_debug. This could be extended in the future to handle semi-hosting according to the MIPS UHI specification. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Tested-by: Paul Burton <paul.burton@imgtec.com>
2016-11-30MIPS: reserve space for exception vectorsDaniel Schwierzeck
In order to set own exception handlers, a table with the exception vectors must be built in DRAM and the CPU EBase register must be set to the base address of this table. Reserve the space above the stack and use gd->irq_sp as storage for the exception base address. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: add asm-offsets for struct pt_regsDaniel Schwierzeck
Import asm-offsets.c from kernel to generate offset for struct pt_regs needed by exception handlers. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: add possibility to setup initial stack and global data in SRAMDaniel Schwierzeck
This adds a new Kconfig option CONFIG_MIPS_INIT_STACK_IN_SRAM which a SoC can select if it supports some kind of SRAM. Together with CONFIG_SYS_INIT_SP_ADDR the initial stack and global data can be set up in that SRAM. This can be used to provide a C environment also for lowlevel_init(). Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: factor out code for initial stack and global dataDaniel Schwierzeck
Move the code for setting up the initial stack and global data to a macro to be able to use it more than once. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: fix iand optimize setup of CP0 registersDaniel Schwierzeck
Clear cp0 status while preserving implementation specific bits. Set bits BEV and ERL as the arch specification requires after a reset or soft-reset exception. Extend and fix initialization of watch registers. Check if additional watch register sets are implemented and initialize them too. Initialize cp0 count as early as possible to get the most accurate boot timing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: fix ROM exception vectorsDaniel Schwierzeck
When booting from ROM, early exceptions can't be handled properly. Instead of busy-looping give the developer the possibilty to examine the situation. Invoke an UHI exception operation which can be read as unhandled exception by a hardware debugger if one is attached. If the debugger doesn't support UHI, the exception is read as unexpected breakpoint. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30MIPS: make inclusion of ROM exception vectors configurableDaniel Schwierzeck
This adds a compile time option to include code for static exception vectors. Static exception vectors are only needed, when the U-Boot entry point is equal to the CPU reset exception vector address. For instance this is the case when U-Boot is used as ROM in Qemu or booted from parallel NOR flash. When U-Boot is booted from RAM (e.g. loaded there by SPL), the exception vectors need to be setup dynamically, which is done in follow-up commits. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-11-30Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-11-30imx6: clock: Enable External Memory Interface [EIM] clock (eim_slow_clock)Lukasz Majewski
This patch extends the imx6 clock code to enable or disable the EIM slow clock, which in necessary when one wants to use EIM interface t o read/write from external memory (e.g. NOR). Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
2016-11-30mx6sx: Add initial support for Samtec VIN|ING 2000 boardChristoph Fritz
This patch adds initial support for Samtec VIN|ING 2000 board. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marex@denx.de>
2016-11-29Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2016-11-29mx6sx: Add initial support for UDOO Neo BoardBreno Lima
UDOO Neo Board is a development board from Seco that has three models: - UDOO Neo Basic - UDOO Neo Basic Kick Starter - UDOO Neo Extended - UDOO Neo Full All versions are based on the i.MX6 SoloX processor. For more details about the UDOO Neo board, please refer to: http://www.udoo.org/udoo-neo/ This work is based on a previous commit of Francesco Montefoschi <francesco.monte@gmail.com>: https://github.com/fmntf/u-boot/commit/877b71184a5105e708024f232d36aed574961844 Only tested on the UDOO Neo Full board. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-11-29ARM: ts4600: add basic board supportSebastien Bourdelin
This commit adds basic support including: MMC, Serial console Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-11-29ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routinesEric Nelson
The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste space on other boards using SPL. Add a KConfig entry to allow boards to selectively include the DDR calibration routines. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29mx6: ddr: add routine to return DDR calibration dataEric Nelson
Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering statistics during an initial production run. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29mx6: ddr: pass mx6_ddr_sysinfo to calibration routinesEric Nelson
The DDR calibration routines have scattered support for bus widths other than 64-bits: -- The mmdc_do_write_level_calibration() routine assumes the presence of PHY1, and -- The mmdc_do_dqs_calibration() routine tries to determine whether one or two DDR PHYs are active by reading MDCTL. Since a caller of these routines must have a valid struct mx6_ddr_sysinfo for use in calling mx6_dram_cfg(), and the bus width is available in the "dsize" field, use this structure to inform the calibration routines which PHYs are active. This allows the use of the DDR calibration routines on CPU variants like i.MX6SL that only have a single MMDC port. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-29mx6: ddr: allow 32 cycles for DQS gating calibrationEric Nelson
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample cycle) for the first PHY. Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 output value isn't polluted with calibration artifacts. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de>
2016-11-29imx: mx6: ddr: add register MPZQLP2CTL for LPDDR2Eric Nelson
Add constants for the MPZQLP2CTL DDR register for both banks to allow setting the LPDDR2 timing values in .cfg files using a named constant instead of hex addresses as is currently done in mx6slevk and other board files. Signed-off-by: Eric Nelson <eric@nelint.com>
2016-11-29imx: make ipu's di configurableMax Krummenacher
The ipu has two display interfaces. Make the used one a parameter in struct display_info_t instead of using unconditionally DI0. DI0 is the default setting. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2016-11-29ARM: mx6: add MMC2 boot device detection support in SPLMarcin Niestroj
Check BOOT_CFG2[3:4] to determine which SD/MMC port is selected to boot from. If MMC2 is selected return BOOT_DEVICE_MMC2. In all other cases return BOOT_DEVICE_MMC1, as we do not have corresponding macro for MMC3 and MMC4. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2016-11-29Merge branch 'master' of git://git.denx.de/u-bootStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2016-11-29armv7: psci: cpu_off: flush D-Cache before disable D-CachePeng Fan
Before disable cache, need to first flush cache. There maybe dirty data in D-Cache before disable D-Cache. After disable D-Cache, the first store instructions in psci_v7_flush_dcache_all will directly store registers {r4-r5, r7, r9-r11, lr} to memory. If there is dirty data before disable D-Cache, psci_v7_flush_dcache_all will flush data to memory, and may overwrite the memory that hold the registers {r4-r5, r7, r9-r11, lr}. So before disable cache, first flush D-Cache. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: York Sun <york.sun@nxp.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Tom Rini <trini@konsulko.com>
2016-11-28ARM: bcm283x: Implement EFI RTS reset_systemAlexander Graf
The rpi has a pretty simple way of resetting the whole system. All it takes is to poke a few registers at a well defined location in MMIO space. This patch adds support for the EFI loader implementation to allow an OS to reset and power off the system when we're outside of boot time. Signed-off-by: Alexander Graf <agraf@suse.de>
2016-11-28ARM: bcm283x: use OF_CONTROL for bcm283xFabian Vogt
This patch removes use of U_BOOT_DEVICE in board/raspberrypi/rpi/rpi.c, enables OF_CONTROL in the config and adjusts the rpi_*defconfig configs. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28fdt: adjust bcm283x device tree for u-bootFabian Vogt
The information currently set via platdata has to be represented in the device tree now. bcm283x-uboot.dtsi adds the u-boot specific "skip-init" property to the serial nodes and enables initialization in the pre-reloc phase. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28fdt: import bcm283x device tree sources from the linux kernel treeFabian Vogt
This patch adds device trees for the bcm283x platform to be used with OF_CONTROL. The version 4.8-rc7 of the linux kernel was used as source. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28keystone2: Move target selection to KconfigAndrew F. Davis
The config option TARGET_K2x_EVM is set by the k2x defconfigs to pick a board target, but the header configs also set K2x_EVM. This config is redundant, remove it and use TARGET_K2x_EVM everywhere in its place. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-11-28sunxi: add support for Nintendo NES Classic EditionFUKAUMI Naoki
Add board support for sun8i_r16 Nintendo NES Classic edition. Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com> [jagan: Add commit message body] Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-28arm: sunxi: do not force USB for arch-sunxiYann E. MORIN
Currently, USB is forced-enabled for the sunxi familly, and there is no way to disable it. However, USB takes a long time to initiliase, delaying the boot by up to 5 seconds (without any USB device attached!). This is a very long delay, especially in cases where USB booting is not wanted at all, and where the device is expected to boot relatively often (even in production). Change the way the dependencies are handled, by only forcibly selecting USB when CONFIG_DISTRO_DEFAULTS ("defaults suitable for booting general purpose Linux distributions") is set. This option defaults to y for the sunxi familly, so the current default behaviour is kept unchanged. Users interested in boot time and/or size will be able to disable this to further disable USB. With USB disabled, the time spent in U-Boot before handing control to the Linux kernel is about 1s now, down from ~5s (Nanopi Neo, sunxi H3). Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans De Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-11-27efi_loader: Allow to compile helloworld.efi w/o bundling itAlexander Graf
Today we can compile a self-contained hello world efi test binary that allows us to quickly verify whether the EFI loader framwork works. We can use that binary outside of the self-contained test case though, by providing it to a to-be-tested system via tftp. This patch separates compilation of the helloworld.efi file from including it in the u-boot binary for "bootefi hello". It also modifies the efi_loader test case to enable travis to pick up the compiled file. Because we're now no longer bloating the resulting u-boot binary, we can enable compilation always, giving us good travis test coverage. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-26Merge git://git.denx.de/u-boot-rockchipTom Rini
2016-11-25rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)Simon Glass
This adds support for the Asus Chromebook Flip, an RK3288-based clamshell device which can flip into 'tablet' mode. The device tree file comes from Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: Add support for veyron-mickey (Chromebit)Simon Glass
This adds support for the Asus Chromebit, and RK3288-based device designed to plug directly into an HDMI monitor. The device tree file comes from Linux v4.8. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: veyron: Adjust ARM clock after relocationSimon Glass
Update board_init() to increase the ARM clock to the maximum speed on veyron boards. This makes quite a large difference in performance. With this change, speed goes from about 750 DMIPS to 2720 DMIPs. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: Move jerry SDRAM settings into its own .dts fileSimon Glass
The SDRAM settings are not common across all veyron models. Move the current settings into Jerry's file. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: Rename jerry files to veyronSimon Glass
At present we have a single rk3288-based Chromebook: chromebook_jerry. But all such Chromebooks can use the same binary with only device-tree differences. The family name is 'veyron', so rename the files accordingly. Also update the device-tree filename since this currently differs from Linux. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: video: Check for device in useSimon Glass
Check whether a display device is in use before using it. Add a comment as to why two displays cannot currently be used at the same time. This allows us to remove the device-tree change that disables vopb on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25rockchip: Allow jerry to use of-platdataSimon Glass
This board always boots from SPI, so update the code to support that with of-platdata. The boot source is not currently available with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25dts: arm: rk3036: add usb vbus nodeKever Yang
add fix regulator node for usb vbus power control. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25arm: rockchip: Fix typo in ROCKCHIP_RK3288 helpAndreas Färber
UART,s -> UARTs, to avoid this spreading via copy&paste. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25arm: dts: Fix Rockchip sort orderAndreas Färber
Sort rk3036 before rk3288. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/Kconfig
2016-11-23powerpc: Drop default CONFIG_MAX_CPUSYork Sun
This configuration has been moved into Kconfig for mpc85xx, and dropped for mpc86xx. Remove the default value in config.h. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: mpc86xx: Remove macro CONFIG_MAX_CPUSYork Sun
This macro CONFIG_MAX_CPUS is not used for MPC86xx SoCs. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8641: Remove macro CONFIG_MPC8641York Sun
Replace CONFIG_MPC8641 with ARCH_MPC8641 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>