| Age | Commit message (Collapse) | Author |
|---|
|
This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also corrects reset_wait_timer from us to ms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
This is only needed when graphics console is used. For kernel with
native graphics driver, this can be turned off to speed up.
Change this option's default to n in the Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.
The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.
Clear the mysterious interrupt bits for this pin.
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
|
|
'commit fa24eca1f20a ("omap: Add routine for setting fastboot variables")'
adds initial support and usage of "fastboot getvar" command
for DRA75x and DRA72x devices.
and
'commit 0f9e6aee9dbc ("arm: dra76: Add support for ES1.0 detection")'
adds initial dra76 device definition
This patch is to extend usage of "fastboot getvar" for DRA76 device.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Extend support for this
revision in "getvar cpu" command.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
[praneeth@ti.com: rebase to u-boot master]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
Last user of this option went away in commit:
fdc7718999 ("board: usb_a9263: Update to support DT and DM")
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
|
|
Upstream Linux has received a few device tree updates to the RPi
which we should propagate into the builtin U-Boot one as well to
gain hardware support.
This patch bumps the dts files to their 4.14 Linux counterparts
with the exception of sdhost on 32bit RPi versions. There we stay
with iproc as the sdhost driver is missing in U-Boot.
Signed-off-by: Alexander Graf <agraf@suse.de>
|
|
Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
ARCH_UNIPHIER_V8_MULTI depends on !SPL, so the default may be hidden.
Use a clearer default.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
Replace printf() with pr_() to specify proper loglevel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
Switch to the single node design.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
|
|
Add support for the DHCOM i.MX6 PDK board. This board has:
- FEC ethernet
- EHCI USB host
- 3x SDMMC
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
|
|
When compiling with W=1 errors are observed:
drivers/pci/pcie_imx.c:517:12: warning: no previous prototype for ‘imx6_pcie_toggle_power’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_power(void)
drivers/pci/pcie_imx.c:528:12: warning: no previous prototype for ‘imx6_pcie_toggle_reset’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_reset(void)
Remove these warnings by adding the functions prototypes on arch-mx6/sys_proto.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
|
|
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/clock.c:1268:5: warning: no previous prototype for ‘do_mx6_showclocks’ [-Wmissing-prototypes] int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Remove this warning by adding the function prototype into arch-mx6/clock.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
|
|
Add initial support for Compulab cl-som-imx7 SoM.
The initial support includes:
- MMC
- eMMC
- SPI flash
- I2C
- FEC
- USB
- Serial console
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
|
|
Add configuration file and spl_boot_device function for the i.MX7 SPL.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
|
|
The configuration files imximage.cfg are used for the DDR controller
configuration.
Add DDR configuration function to replace the DDR controller
configuration in the imximage.cfg file. The function can be used for
DDR size detection.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
|
|
The CCM_ macros use the CCM_BASE_ADDRESS macro, which doesn't exist.
Replace the CCM_BASE_ADDRESS macros with CCM_BASE_ADDR.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
|
|
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/soc.c:213:12: warning: no previous prototype for ‘get_board_rev’ [-Wmissing-prototypes] u32 __weak get_board_rev(void)
Fix the build warning by including <asm/bootm.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
|
|
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning:
no previous prototype for ‘board_mmc_get_env_dev’
[-Wmissing-prototypes] int board_mmc_get_env_dev(int devno)
Remove this warning by adding the function prototype into sys_proto.h file.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
|
|
We do not use print_cpuinfo and clock command code in SPL,
disable it when building SPL image.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
|
|
|
|
|
|
Add DT nodes to enable SDR104/HS200 modes on Salvator-X boards.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
|
|
|
Add jump_to_image_linux() for arm64. Add "noreturn" flag to
armv8_switch_to_el2(). Add hooks to fsl-layerscape to enable falcon
boot.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
Tested-by: Łukasz Majewski <lukma@denx.de>
|
|
gd->ram_size is reduced in this function to reserve secure memory.
Avoid running this function again to further reduce memory size.
This fixes issue for SPL boot with PPA image loaded in which case
secure memory is incorrectly allocated due to repeated calling.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Commit 15eb1d43bf47 ("spl: reorder the assignment of board info to
global data") intended to move assignment of board info earlier,
into board_init_r(). However, function preload_console_init() is
called either from spl_board_init() or from board_init_f(). For the
latter case, the board info assignment is much earlier than proposed
board_init_r(). Create a new function to fill gd->bd and call this
function when needed.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Lokesh Vutla <lokeshvutla@ti.com>
CC: Ravi Babu <ravibabu@ti.com>
CC: Lukasz Majewski <lukma@denx.de>
CC: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
This change is required due to trusted OS (OP-TEE) not being position
independent code, it requires compile time fixed base address.
To take care of this it is assumed that all layerscape armv8 platforms
has minimum 2G ddr in first region. So we can have fixed address
space (66 MB -> (2MB for PPA + 64MB for trusted OS)) allocated from
top of first 2G ddr region and compile trusted OS with this fixed
base address.
But one exception here is ls1012 where we have only 1G (rdb) or 512M
(frdm) ddr memory. For those we can have different fixed compile time
base addresses for trusted OS.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.
Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
|
Realloc does not free the old memory area if it fails.
Identified by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 evaluation board.
Evaluation board needs a second pinctrl node
"pinctrl_sdmmc1_level_shifter" to drive a level shifter
on MMC bus.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
|
|
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 discovery board.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
|
|
As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer
clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2
which need to be divided by 2.
Signed-off-by: Bo Shen <voice.shen@gmail.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
|
|
This patch remove the extra compatibility string "st,stm32h7-usart"
and "st,stm32f7-usart" to avoid confusion, save some time & space.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
|
|
macro branch_if_master checks master CPU via (Aff3 & (Aff2:Aff1:Aff0))
it is simple but a little obscure.
fix by checking Affx fields within MPIDR_EL1 directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
|
|
relocate_code() allocates 32 bytes stack frame but only 16 bytes are
freed before return. it will cause errors to possible previous frames
and doesn't make relocate_code() look like a function.
fix by freeing 32 bytes stack space
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
the new GD address is calculated via board data BD currently
it require the new GD area locates below BD tightly, so a strict
constraint is imposed on memory layout which maybe make special
platform unpleasant.
fix it by getting new GD address from gd->new_gd directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
|
|
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't
utilize ACPI by default. Here is an attempt to unleash ACPI flexibility
power on Intel Merrifield based platforms.
The change brings minimum support of the devices that found on
Intel Merrifield based end user device.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
|
When eMMC was formattaed for Linux partition table, "userdata" partition
is missing. In this case, part_get_info_by_name() iterates over all
registered drivers (which are PART_TYPE_EFI, PART_TYPE_DOS and
PART_TYPE_ISO). And when it comes to PART_TYPE_ISO (which has empty
partition table), we can see next warning in U-Boot output:
** First descriptor is NOT a primary desc on 1:1 **
This patch switches to part_get_info_by_name_type() API in order to
check only EFI partitions for "userdata" partitions. This eliminates
mentioned warning.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
When using regular $partitions variable (for Linux boot), we can see
some unwanted messages:
> ERROR: cannot find partition: 'userdata'
> at arch/arm/mach-omap2/utils.c:96/omap_mmc_get_part_size()
> Warning: fastboot.userdata_size: unable to calc
Let's remove those, as missing 'userdata' partition is correct behavior
for Linux partition, and we don't want to see some Android-related
messages in this case.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
|
|
This board builds an U-Boot binary that is bootable with QEMU's 'virt'
machine on ARM. The minimal QEMU command line is:
qemu-system-arm -machine virt,highmem=off -bios u-boot.bin
(Note that the 'highmem=off' parameter to the 'virt' machine is required for
PCI to work in U-Boot.) This command line enables the following:
- u-boot.bin loaded and executing in the emulated flash at address 0x0
- A generated device tree blob placed at the start of RAM
- A freely configurable amount of RAM, described by the DTB
- A PL011 serial port, discoverable via the DTB
- An ARMv7 architected timer
- PSCI for rebooting the system
- A generic ECAM-based PCI host controller, discoverable via the DTB
Additionally, QEMU allows plugging a bunch of useful peripherals to the PCI bus.
The following ones are supported by both U-Boot and Linux:
- To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device ich9-ahci,id=ahci -device ide-drive,drive=mydisk,bus=ahci.0
- To add an Intel E1000 network adapter, pass e.g.:
-net nic,model=e1000 -net user
- To add an EHCI-compliant USB host controller, pass e.g.:
-device usb-ehci,id=ehci
- To add a NVMe disk, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
|
|
In order to be able to select the right DTB, we need to have identified the
board before spl_early_init() is called.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
|
|
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
|
