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2019-10-08Kconfig: Migrate CONFIG_CSF_SIZE to KconfigBreno Matheus Lima
Move CONFIG_CSF_SIZE to Kconfig and define default value as 0x4000. mx8mqevk requires 0x2000 add this configuration in imx8mq_evk_defconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXTYe Li
On i.MX7ULP B0, there is change in NIC clock dividers architecture. On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but on B0 they are parallel with NIC1 DIV. So now the dividers are independent. This patch modifies the scg_nic_get_rate function according to this change. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chipYe Li
The normal target frequency for ULP A7 core is 500Mhz, but now ROM set the core frequency to 413Mhz. So change it to 500Mhz in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Add CPU revision check for B0Peng Fan
Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Workaround APLL PFD2 to 345.6MhzYe Li
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix SPLL/APLL clock rate calculation issueYe Li
The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix wrong i2c configuration nameYe Li
Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Add CONFIG_MX7ULP to kconfigYe Li
Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix PCC register bits mask and offset issueYe Li
The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we can't get the right frequency. Fix them to correct value. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Correct the clock indexBai Ping
On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix system reset after a7 rtc alarm expired.Bai Ping
The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: i.MX7ULP: add get_boot_devicePeng Fan
Add get_boot_device for i.MX7ULP Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08nitrogen6x: migrate to using device treeTroy Kisky
Migrate to using device tree required for further driver model integration. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2019-10-08ARM: imx: Support larger SPL size on IMX6DQRobert Hancock
Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08spl: imx: only use HAB if spl fit signature is not enabledRicardo Salveti
There is no need to use HAB for FIT signature validation when SPL_FIT_SIGNATURE is also enabled, as that will be validated via the normal U-Boot signed FIT image flow. This allows having SPL validated by HAB and the payloads to follow being validated with FIT signatures only. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: apalis_imx6: select MX6Q via KconfigRicardo Salveti
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q variants, which are quite similar and already managed via only one dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in order to automatically enable the HAS_CAAM and MX6_SMP features. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08arm: dts: imx: fsl-imx8qm.dtsi: add gpio aliases to fix gpio commandPeng Fan
The gpio command currently uses equal bank names "GPIO0_" for all existing gpio banks, i. e.: U-Boot# gpio status -a Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: input: 0 [ ] ... Bank GPIO0_: GPIO0_0: input: 0 [ ] GPIO0_1: input: 0 [ ] ... So the command is broken, it is not possible to address a desired bank. Add gpio aliases to fix this. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08spl: pass args to board_return_to_bootromPeng Fan
Pass spl_image and bootdev to board_return_bootrom. i.MX8MN needs the args to let ROM to load images Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-10-08imx: mx6ul_14x14_evk: convert to DM_VIDEOPeng Fan
To support DM_VIDEO, Add display node for lcdif Drop board iomuxc settings. Enable DM_VIDEO Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
2019-10-08imx: add i.MX6ULZ boardPeng Fan
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible with i.MX6ULL. so most code of i.MX6ULL can be reused by i.MX6ULZ. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08imx: add i.MX6ULZ cpu typePeng Fan
Add i.MX6ULZ cpu type and helper. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: import dts for i.MX6ULZPeng Fan
Import kernel dts for i.MX6ULZ from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: sync dts for i.MX6ULLPeng Fan
Sync kernel dts for i.MX6ULL from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08arm: dts: sync dts for i.MX6ULPeng Fan
Sync kernel dts for i.MX6UL from commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux") Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-07NET: DW: fix regression for ARC boardsEugeniy Paltsev
The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac") breaks designware ethernet for all ARC boards. It removes "altr, socfpga-stmmac" compatible from "drivers/net/designware.c" without changing compatible in the boards which use it. Fix that by adding "snps,arc-dwmac-3.70a" compatible string to "drivers/net/designware.c" and using it in ARC boards device tree. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-05Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
- ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulator
2019-10-04ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPLAdam Ford
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file which will enable these functions so SPL can properly setup UART, detect microSD card, and startup. Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled, remove MMC init") Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-04board: ti: am654: Disable TRNG node for HS devicesAndrew F. Davis
On HS devices the access to TRNG is restricted on the non-secure ARM side, disable the node in DT to prevent firewall violations. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-10-04arm: K3: Increase default SYSFW image size allocationAndrew F. Davis
The memory allocated to store the FIT image containing SYSFW and board configuration data is statically defined to the largest size expected. This was 269000 bytes but now needs to be grown to 276000 to make room for the signatures attached to the board configuration data on High Security devices. Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-10-01x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parametersAndy Shevchenko
This is reincarnation of the U-Boot commit 3469bf4274540d1491d58e878a9edc0bdcba17ac Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Date: Wed Jan 10 19:40:15 2018 +0200 x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters after upstream got eventually the Linux kernel commit e6e094e053af75cbc164e950814d3d084fb1e698 Author: Juergen Gross <jgross@suse.com> Date: Tue Nov 20 08:25:29 2018 +0100 x86/acpi, x86/boot: Take RSDP address from boot params if available Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-30ARM: dts: rmobile: Restore increase off-on delay on the SD Vcc regulatorMarek Vasut
This patch restores commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator"), which was accidentally dropped during DT resync in commit 317d13ac6307 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0"). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Fixes: 317d13ac6307 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0")
2019-09-28rockchip: make_fit_atf.py: fix .its generation for a single atf imageHeiko Stuebner
The commit 619f002db864 ("rockchip: make_fit_atf.py: fix loadables property set error") fixed the double-loading of the primary atf-image, but didn't take into account that there may be rare atf images with only that main section present. Right now this will result in a broken its due to the loadables section not getting closed correctly, so fix that by adapting the guards around the loop. The guards now protect against 0 segments when the bl31 binary doesn't contain any section and 1 segment when only a core atf section is present. Fixes: 619f002db864 ("rockchip: make_fit_atf.py: fix loadables property set error") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-28rockchip: misc: read the correct number of bytes from the efuseHeiko Stuebner
Originally the cpuid var the value gets read into was defined as u8 cpuid[RK3399_CPUID_LEN]; hence the sizeof(cpuid) would return the correct the correct number of array elements. With the move to a separate function cpuid becomes a pointer and sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case. We do have the actual id length available as function param so use it for actual amount of bytes to read. Fixes: 04825384999f ("rockchip: rk3399: derive ethaddr from cpuid") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19rockchip: rk3288-tinker: Attach missing peripherals at SPLMichael Trimarchi
Tinker board needs to mux all the sdmmc gpio and activate the regulator connected to bank 7. Remove all the bank that are not in use and mark them as dm,spl so-that it would initialize at SPL. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19rockchip: spi-boot-order: Trival fix to newline missingJagan Teki
newline \n was missed in fdt_path_offset, error loop. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-19rockchip: rk3288: vyasa: Drop ROCKCHIP_BROM_HELPER selectionJagan Teki
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM has been defined, so drop the explicit enablement for vyasa board. This change is supposed to missed during config move to other locations, and missed to drop the same. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2019-09-16Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Add emmc hs200 support - Few bug fixes related to serdes, I2C, ethernet, etc
2019-09-15Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2019-09-14sh: r2dplus: Fix missing PCI rangeMarek Vasut
Add missing PCI range for translating DRAM to bus addresses. This fixes e.g. PCI NIC interface and allows network to work in QEMU. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-14sh: Fix SH4 build with GCC versions without -m4-nofpuMarek Vasut
Pass -m4 instead of -m4-nofpu to GCC versions which do not support the -m4-nofpu option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-14sh: Fix incorrect linking with new binutilsMarek Vasut
Since binutils 2.30 , the resulting U-Boot binary was incorrectly linked against address 0 instead of text base, fix it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-09-13ARM: dts: dra74x: Fix iodelay configuration for mmc3Faiz Abbas
According to the latest am572x[1] and dra74x[2] data manuals, mmc3 default, hs, sdr12 and sdr25 modes use iodelay values given in MMC3_MANUAL1. Set the MODE_SELECT bit for these so that manual mode is selected and correct iodelay values are configured. [1] http://www.ti.com/lit/ds/symlink/am5728.pdf [2] http://www.ti.com/lit/ds/symlink/dra746.pdf Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-09-13arm: k3: Use get_ti_sci_handle() where ever possibleLokesh Vutla
Instead of calling uclass apis everywhere, use get_ti_sci_handle() when ever ti_sci is needed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13arm: k3: Fix getting ti_sci handleLokesh Vutla
API get_ti_sci_handle() is relying on the device-tree node name to be "dmsc" for probing the ti_sci device. But with the introduction of debug messages for dmsc, the node name changed to dmsc@44083000. Because of this ti_sci is never probed cause a boot failure. Instead of relying on device-tree node name, use the first available firmware node for probing ti_sci. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-09-13ARM: omapl138_lcdk: Enable DM_GPIO and DM and GPIO CommandsAdam Ford
The da8xx GPIO driver is available with DM_GPIO support. This patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO. Signed-off-by: Adam Ford <aford173@gmail.com>
2019-09-13arm: am437x: cm-t43: Add device tree, enable OF_CONTROLSuniel Mahesh
Add device tree from Linux for driver model conversion and enable OF_CONTROL. This will remove the following compile warning: ================================================== Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument =================================================== Target was compile tested, build was clean. Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-09-12armv8: ls1028a: Updated serdes configuration for 0x13BBHou Zhiqiang
In SerDes protocol 0x13BB, lane C was erroneously assigned to PCIE1, this is now updated to PCIE2 Fixes: 36f50b75238e ("armv8: ls1028a: Add other serdes protocal support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12armv8: fsl-layerscape: Fix typo in Layerscape PCIe config entryHou Zhiqiang
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this typo results in skipping the fixup of Linux PCIe DT nodes. Also enable the fixup when Layerscape Gen4 controller driver is enabled. Fixes: 4da0e52c9dc0 (armv8: fsl-layerscape: fix config dependency for layerscape pci code) Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12armv8: fsl-layerscape: Update I2C clock dividerChuanhua Han
By default, i2c input clock is programmed at platform clk / 2 in u-boot, but this is not correct for all the platforms, Update I2C clock divider's default values as per SoC (LS1012A, LS1028A, LX2160A and LS1088A). Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-09-12armv8: ls1028a: configure PMU's PCTBENR to enable WDTThomas Schaefer
The SP805-WDT module on LS1028A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>