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2012-02-03Blackfin: easylogo: add lzma logosMike Frysinger
The bf527-ezkit boards are getting too big to fit into their reserved flash space, so we need to use a lzma compressed logo. Since the video driver code is very similar, add lzma compressed support to all of the Blackfin video drivers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-18Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk
* 'next' of git://git.denx.de/u-boot-video: ipu_common: Add ldb_clk for use in parenting the pixel clock ipu_common: Do not hardcode the ipu_clk frequency ipu_common: Rename MXC_CCM_BASE ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53 ipu_common: Only apply the erratum to MX51 video: Rename CONFIG_VIDEO_MX5 mx6: Allow mx6 to access the IPUv3 registers common lcd: minor coding style changes Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-16nios2: move gd and bd into BSSThomas Chou
As suggested by Graeme Russ, move gd and bd data structrures to BSS instead of calculating the locations around the stack and heap. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Mike Frysinger <vapier@gentoo.org>
2012-07-11mxc_i2c: specify i2c base address in config fileTroy Kisky
The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-10mx6: Allow mx6 to access the IPUv3 registersFabio Estevam
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk
* 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10EXYNOS: Fix USB compiler warningRajeshwari Shinde
Fixed the compiler warning message. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-09Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk
* 'master' of git://git.denx.de/u-boot-usb: CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250 EXYNOS5: USB: Fix incorrect USB base addresses EXYNOS: Add power Enable/Disable for USB-EHCI USB: EXYNOS: Set USB 2.0 HOST Link mode EXYNOS5: Add structure for PMU registers EXYNOS5: Fix system register structure USB: EXYNOS: Incorporate EHCI review comments Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-09tegra: usb: Fix device enumeration problem of USB1Jim Lin
A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add GMC/GMD funcmux entry for SFLASHStephen Warren
This is used on TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add enterrcm commandStephen Warren
Tegra's boot ROM supports a mode whereby code may be downloaded and flash programmed over a USB connection. On dev boards, this is typically entered by holding down a "force recovery" button and resetting the CPU. However, not all boards have such a button (one example is the Compulab Trimslice), so a method to enter RCM from software is useful. This change implements the command "enterrcm" to do this, and enables it for all Tegra boards by default. Even on boards other than Trimslice, controlling this over a UART may be useful, e.g. to allow simple remote control without the need for mechanical button actuators, or hooking up relays/... to the button. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: usb: fix wrong error checkLucas Stach
loop_count runs down from 10000, so the correct condition to error out is ==0. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Tom Warren <twarren.nvidia@gmail.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add ULPI on USB2 funcmux entryLucas Stach
This is needed as a prerequisite for Tegra USB ULPI support within U-Boot. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Stephen Warren <swarren@wwwdotorg.org> CC: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09EXYNOS5: USB: Fix incorrect USB base addressesRajeshwari Shinde
This patch corrects the base addresses for USB_PHY and USB_OTG. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09EXYNOS: Add power Enable/Disable for USB-EHCIRajeshwari Shinde
This patch adds functions to enable/disable the power of USB host controller for EXYNOS5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09USB: EXYNOS: Set USB 2.0 HOST Link modeRajeshwari Shinde
This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09EXYNOS5: Add structure for PMU registersRajeshwari Shinde
This patch adds power mananagement registers structure for exynos5 SoC. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09EXYNOS5: Fix system register structureRajeshwari Shinde
This patch corrects the SYSREG structure. We have removed the sysreg.h added in the previous patchset version as the sysreg structure is already defined in system.h. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-09USB: EXYNOS: Incorporate EHCI review commentsRajeshwari Shinde
This patch incorates the review comments given by Minkyu Kang for EHCI support on EXYNOS Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2012-07-09Revert "arm: bugfix: save_boot_params_default accesses uninitalized stack ↵Wolfgang Denk
when -O0" This reverts commit fa042186b932e9b9ee9a2fd8a04a3acf7c70d224. It causes build warnings like this: cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by default] Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-08Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk
* 'master' of git://git.denx.de/u-boot-arm: (212 commits) ARM: cache: Move the cp15 CR register read before flushing the cache. ARM: introduce arch_early_init_r() PXA: Enable CONFIG_PREBOOT on zipitz2 ARM: mx28: Remove CONFIG_ARCH_CPU_INIT No need to define CONFIG_ARCH_CPU_INIT. add new board vl_ma2sc MTD: SPEAr SMI: Add write support for length < 4 bytes i2c: designware_i2c.c: Add support for the "i2c probe" command rtc/m41t62: Add support for M41T82 with HT (Halt Update) SPL: ARM: spear: Add SPL support for SPEAr600 platform Makefile: Add u-boot.spr build target (SPEAr) SPL: ARM: spear: Remove some objects from SPL build SPL: lib/Makefile: Add crc32.c to SPL build SPL: common/Makefile: Add image.c to SPL build arm: Don't use printf() in SPL builds GPIO: Add SPEAr GPIO driver net: Multiple updates/enhancements to designware.c cleanup/SPEAr: Define configuration flags more elegantly cleanup/SPEAr: Remove unnecessary parenthesis SPEAr: Correct SoC ID offset in misc configuration space SPEAr: explicitly select clk src for UART SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION SPEAr: Enable dcache for fast file transfer SPEAr: Enable autoneg for ethernet SPEAr: Enable udc and usb-console support only for usbtty configuration SPEAr: Enable usb device high speed support SPEAr: Initialize SNOR in early_board_init_f SPEAr: Change the default environment variables SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK) SPEAr: Add configuration options for spear3xx and spear6xx boards SPEAr: Add basic arch related support for SPEAr SoCs SPEAr: Add interface information in initialization SPEAr: Add macb driver support for spear310 and spear320 SPEAr: Configure network support for spear SoCs SPEAr: Place ethaddr write and read within CONFIG_CMD_NET SPEAr: Eliminate dependency on Xloader table SPEAr: Fix ARM relocation support st_smi: Fixed page size for Winbond W25Q128FV flash st_smi: Change timeout loop implementation st_smi: Fix bug in flash_print_info() st_smi: Change the flash probing method st_smi: Removed no needed dependency on ST_M25Pxx_ID st_smi: Fix smi read status st_smi: Move status register read before modifying ctrl register st_smi: Read status until timeout happens st_smi: Enhance the error handling st_smi: Change SMI timeout values st_smi: Return error in case TFF is not set st_smi: Add support for SPEAr SMI driver mtd/NAND: Remove obsolete SPEAr specific NAND drivers SPEAr: Configure FSMC driver for NAND interface mtd/NAND: Add FSMC driver support arm/km: remove calls to kw_gpio_* in board_early_init_f arm/km: add implementation for read_dip_switch arm/km: support the 2 PCIe fpga resets arm/km: skip FPGA config when already configured arm/km: redefine piggy 4 reg names to avoid conflicts arm/km: cleanup km_kirkwood boards arm/km: enable BOCO2 FPGA download support arm/km: remove portl2.h and use km_kirkwood instead arm/km: convert mgcoge3un target to km_kirkwood arm/km: add kmcoge5un board support arm/km: add kmnusa board support arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0 cm-t35: fix incorrect NAND_ECC layout selection ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls. ARM: OMAP4/5: Move USB pads to essential list. ARM: OMAP4/5: Move USB clocks to essential group. ARM: OMAP4/5: Move gpmc clocks to essential group. ARM: OMAP4+: Move external phy initialisations to arch specific place. omap4: Use a smaller M,N couple for IVA DPLL da850/omap-l138: Enable auto negotiation in RMII mode omap: am33xx: accomodate input clocks other than 24 Mhz omap: emif: fix bug in manufacturer code test omap: emif: deal with rams that return duplicate mr data on all byte lanes OMAP4+: Force DDR in self-refresh after warm reset OMAP4+: Handle sdram init after warm reset ARM: OMAP3+: Detect reset type arm: bugfix: Move vector table before jumping relocated code Kirkwood: Add support for Ka-Ro TK71 arm/km: use spi claim bus to switch between SPI and NAND arm/kirkwood: protect the ENV_SPI #defines ARM: don't probe PHY address for LaCie boards lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2 lacie_kw: fix SDRAM banks number for net2big_v2 Kirkwood: add lschlv2 and lsxhl board support net: add helper to generate random mac address net: use common rand()/srand() functions lib: add rand() function kwboot: boot kirkwood SoCs over a serial link kw_spi: add weak functions board_spi_claim/release_bus kw_spi: support spi_claim/release_bus functions kw_spi: backup and reset the MPP of the chosen CS pin kirkwood: fix calls to kirkwood_mpp_conf kirkwood: add save functionality kirkwood_mpp_conf function km_arm: use filesize for erase in update command arm/km: enable mii cmd arm/km: remove CONFIG_RESET_PHY_R arm/km: change maintainer for mgcoge3un arm/km: fix wrong comment in SDRAM config for mgcoge3un arm/km: use ARRAY_SIZE macro arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE arm/km: add piggy mac adress offset for mgcoge3un arm/km: add board type to boards.cfg AT91SAM9*: Change kernel address in dataflash to match u-boot's size ATMEL/PIO: Enable new feature of PIO on Atmel device ehci-atmel: fix compiler warning AT91: at91sam9m10g45ek : Enable EHCI instead OHCI Atmel : usb : add EHCI driver for Atmel SoC Fix: AT91SAM9263 nor flash usage Fix: broken boot message at serial line on AT91SAM9263-EK board i.MX6 USDHC: Use the ESDHC clock mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register i.MX28: Add function to adjust memory parameters mx28evk: Fix PSWITCH key position mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition mx53ard: Remove unused CONFIG_MII_GASKET mx6: Avoid writing to read-only bits in imximage.cfg m28evk: use same notation to alloc the 128kB stack ... Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-08Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/mpc85xx: Fix Handling the lack of L2 cache on P2040/P2040E powerpc/mpc85xx: Workaround for erratum CPU_A011 powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() powerpc/P4080: Check SVR for CPU22 workaround lib/powerpc: addrmap_phys_to_virt() should return a pointer powerpc/85xx: clean up P1022DS board configuration header file powerpc/85xx: fdt_set_phy_handle() should return an error code powerpc/85xx: minor clean-ups to the P2020DS board header file powerpc/p1010rdb: add readme document for p1010rdb powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting powerpc/mpc85xx:Add debugger support for e500v2 SoC powerpc/85xx:Fix NAND code base to support debugger powerpc/85xx:Make debug exception vector accessible powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger PATCH 1/4][v4] doc:Add documentation for e500 external debugger support powerpc/p1010rdb: update mux config of p1010rdb board powerpc/mpc85xx:Add BSC9131 RDB Support powerpc/mpc85xx:Add BSC9131/BSC9130/BSC9231 Processor Support powerpc/85xx: Add USB device-tree fixup for various platforms Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-07ARM: cache: Move the cp15 CR register read before flushing the cache.SRICHARAN R
The following is the cleanup sequence in arch/arm/cpu/armv7/cpu.c int cleanup_before_linux(void) { ... ... dcache_disable(); v7_outer_cache_disable(); invalidate_dcache_all(); } 1) invalidate_dcache_all call expects that all the caches has been flushed, invalidated and there are no dirty entries prior to its execution. In the above sequence dcache_disable() flushes, invalidates the caches and turns off the mmu. But after it cleanups the cache and before the mmu is disabled there is a cp_delay() function which has STR instruction. On certain cores like the cortex-a15, cache hit and a write can happen to a cache line even when the dcache is disabled. So the above mentioned STR instruction creates a dirty entry after cleaning. The mmu gets disabled after this. 2) invalidate_dcache_all invalidates the cache lines. Again on cores like cortex-a15, invalidate instruction flushes the dirty line as well. So some times the dirty line from sequence 1 can corrupt the memory resulting in a crash. Fixing this by moving the get_cr() and cp_delay() calls before cleaning up the cache, thus avoiding the dirty entry. Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07ARM: introduce arch_early_init_r()Fabio Estevam
Introduce arch_early_init_r() function, which can be useful for doing early initialization after relocation has happened. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07ARM: mx28: Remove CONFIG_ARCH_CPU_INITFabio Estevam
No need to define CONFIG_ARCH_CPU_INIT. All mx28 based boards should use arch_cpu_init(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-07No need to define CONFIG_ARCH_CPU_INIT.Fabio Estevam
All mx6 based boards should use arch_cpu_init(). Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-07SPL: ARM: spear: Add SPL support for SPEAr600 platformStefan Roese
This patch adds SPL support for SPEAr600. Currently only SNOR (Serial NOR) flash support is included. Other boot devices (NAND, MMC, USB ...) may be added with later patches. Tested on the STM SPEAr600 evaluation and x600 SPEAr600 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com>
2012-07-07arm: Don't use printf() in SPL buildsSimon Glass
raise() likes to call printf() if it is available, but in SPL builds it either is not available, or adds a large chunk to the resulting image size. So don't call it even if it is available. This change reduces SPL size from 10KB to 6.3KB on hawkboard, for example, using generic relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
2012-07-07GPIO: Add SPEAr GPIO driverStefan Roese
Tested on x600 (SPEAr600). Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07cleanup/SPEAr: Remove unnecessary parenthesisAmit Virdi
In SPEAr configuration files, unnecessary paranthesis are used in some \#defines. Remove them as they serve no purpose Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: Correct SoC ID offset in misc configuration spaceShiraz Hashim
SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: explicitly select clk src for UARTShiraz Hashim
UART in u-boot intends to run on 48MHz clock supplied by USB PLL. Explicitly select the intended clock source. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: Add basic arch related support for SPEAr SoCsVipin KUMAR
Earlier, architecture specific init code was mixed with board initialization code in board/spear/... This patch updates architecture support for SPEAr in latest u-boot and prints the SoC information. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: Add macb driver support for spear310 and spear320Vipin KUMAR
SPEAr310 and SPEAr320 SoCs have an extra ethernet controller. The driver for this device is already supported by u-boot, so configuring board configuration file and defining base addresses etc to make use of the common driver Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: Configure network support for spear SoCsVipin KUMAR
Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07SPEAr: Eliminate dependency on Xloader tableAmit Virdi
Xloader table was used primarily to inform u-boot about the DDR size. However, now the ddr size is calculated at runtime which eliminates any need for the Xloader table. So removing this unnecessary code. Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07st_smi: Add support for SPEAr SMI driverVipin KUMAR
SMI is the serial memory interface controller provided by ST. Earlier, a driver exists in the u-boot source code for the SMI IP. However, it was specific to spear platforms. This commit converts the same driver to a more generic driver. As a result, the driver files are renamed to st_smi.c and st_smi.h and moved into drivers/mtd folder for reusability by other platforms using smi controller peripheral. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
2012-07-07mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR
Since, SPEAr platform uses generic FSMC driver now, so spear specific files drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are removed Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07SPEAr: Configure FSMC driver for NAND interfaceVipin KUMAR
Since FSMC is a standard IP and it supports different memory interfaces, it is supported independent of spear platform and spear is configured to use that driver for interfacing with the NAND device Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
2012-07-07arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0Tetsuyuki Kobayashi
save_boot_params_default() in cpu.c accesses uninitialized stack area when it compiled with -O0 (not optimized). Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Tom Rini <trini@ti.com>
2012-07-07ARM: OMAP4/5: Move USB clocks to essential group.SRICHARAN R
USB clocks will be required for fastboot, tftp related functionalities. Move these clocks to essential group inorder to have the functionality working when non-essential clocks are not enabled. Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07ARM: OMAP4/5: Move gpmc clocks to essential group.SRICHARAN R
GPMC clocks are currently getting enabled as a part non-essential clocks. This will be required during NOR boot. Move this to essential group to keep the functionality, when non-essential clocks are not enabled. Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07ARM: OMAP4+: Move external phy initialisations to arch specific place.SRICHARAN R
The external phy is present in the case OMAP5 soc is currently configured in emif-common.c. This results in having dummy structures for those Socs which do not have a external phy. So by having a weak function in emif-common and overriding it in OMAP5, avoids the use of dummy structures. Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07omap4: Use a smaller M,N couple for IVA DPLLSebastien Jan
This reduced M,N couple corresponds to the advised value from TI HW team. Tested on 4460 Pandaboard, it also provides peripheral clocks closer to the advised values. Signed-off-by: Sebastien Jan <s-jan@ti.com>
2012-07-07omap: am33xx: accomodate input clocks other than 24 MhzSteve Sakoman
The PLL setup values currently assume a 24 Mhz input clock. This patch uses V_OSCK from the board config file to support boards with different input clock rates. Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07omap: emif: fix bug in manufacturer code testSteve Sakoman
Code currently tests for <= 0xff. Micron manufacturer code is 0xff, so Micron memory will not be detected! Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07omap: emif: deal with rams that return duplicate mr data on all byte lanesSteve Sakoman
Some rams (Micron for example) return duplicate mr data on all byte lanes. Users of the get_mr function currently don't deal with this duplicated data gracefully. This patch detects the duplicated data and returns only the expected 8 bit mr data. Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-07-07OMAP4+: Force DDR in self-refresh after warm resetLokesh Vutla
Errata ID:i727 Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0] REG_REFRESH_RATE parameter taking into account frequency of the device. When a warm reset is applied on the system, the OMAP processor restarts with another OPP and so frequency is not the same. Due to this frequency change, the refresh rate will be too low and could result in an unexpected behavior on the memory side. Workaround: The workaround is to force self-refresh when coming back from the warm reset with the following sequence: • Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2 • Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0 • Do a dummy read (loads automatically new value of sr_tim) This will reduce the risk of memory content corruption, but memory content can't be guaranteed after a warm reset. This errata is impacted on OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3 OMAP4460: 1.0, 1.1 OMAP4470: 1.0 OMAP5430: 1.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07OMAP4+: Handle sdram init after warm resetLokesh Vutla
EMIF and DDR device state are preserved in warmreset. Redoing the full initialisation would cause unexpected behaviour. Do only partial initialisation to account for frequency change. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
2012-07-07ARM: OMAP3+: Detect reset typeLokesh Vutla
Certain modules are not affected by means of a warm reset and need not be configured again. Adding an API to detect the reset reason warm/cold. This will be used to skip the module configurations that are retained across a warm reset. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com>
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