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2020-07-14imx8m: configure NoC clkPeng Fan
Configure NoC clk for better system performance Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14imx8m: configure arm clk sources from PLLPeng Fan
A53 CCM root max support 1GHz, to support high freq, we need to switch ARM clk sources from ARM PLL directly. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14imx: remove imx sip filePeng Fan
We have switch to use arm_smccc_smc, no need to keep i.MX specific sip wrapper. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14imx: bootaux: use arm_smccc_smcPeng Fan
Use arm_smccc_smc to replace call_imx_sip Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14imx8m: soc: use arm_smccc_smcPeng Fan
Use arm_smccc_smc to replace call_imx_sip Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14imx8: misc: use arm_smccc_smcPeng Fan
Use arm_smccc_smc to replace call_imx_sip Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issueOliver Chen
Add logic to automatically update umctl2's setting based on phy training CDD value for rank to rank space issue Acked-by: Ye Li <ye.li@nxp.com> Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14drivers: ddr: imx8mp: Add inline ECC feature supportSherry Sun
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC". This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and DDR3L). When this feature is enabled by software, the DRAM Controller reserves 12.5% of DRAM capacity for ECC information, and presents only the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to the rest of the SoC. The DRAM memory can be divided into 8 regions so that if a use case only requires ECC protection on a subset of memory, then only that subset of memory need support inline ECC. If this occurs, then there is no performance penalty accessing the non-ECC-protected memory (no need to access ECC for this portion of the memory map). This is all configured with the DRAM Controller. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-13arm: k3: use correct weak function name spl_board_prepare_for_linuxPatrick Delaunay
Replace the function spl_board_prepare_for_boot_linux by the correct name of the weak function spl_board_prepare_for_linux defined in spl.h. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-07-13arm: k3: Consolidate and silence k3_fit_atf.sh callJan Kiszka
Buiding u-boot-spl-k3[_HS].its is currently unconditionally verbose about what it does. Change that by wrapping the call to k3_fit_atf.sh into a cmd, also using that chance to reduce duplicate lines of makefile code - only IS_HS=1 is different when CONFIG_TI_SECURE_DEVICE is on. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-07-13arm: dts: k3-am65: Sync CPSW DT node from kernelVignesh Raghavendra
Sync CPSW DT node from kernel and move it out of -u-boot.dtsi file. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13arm: dts: k3-j721e: Sync CPSW DT node from kernelVignesh Raghavendra
Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-07-13arm: dts: k3-am65/j721e: Sync DMA DT bindings from Kernel DTVignesh Raghavendra
Sync DT bindings from kernel DT and move them to out of -u-boot.dtsi files. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2020-07-11Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini
- Enable DM_SPI on siemens omap boards (Jagan) - Dropped some non-dm supported omap3 boards (Jagan) - Dropped non-dm code in omap3 spi driver (Jagan) - Dropped non-dm code in kirkwood spi driver (Bhargav)
2020-07-11Merge tag 'uniphier-v2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier UniPhier SoC updates for v2020.10 - remove workaround for Cortex-A72 - increase U-Boot proper size to 2MB - sync DT with Linux - add system bus controller driver - improve serial driver - add reset assertion to Denali NAND driver
2020-07-11ARM: uniphier: remove NAND reset codeMasahiro Yamada
Now that commit 3e57f879eee6 ("mtd: nand: raw: denali: Assert reset before deassert") added the reset assertion, this code in the board file is unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: remove sbc/ directoryMasahiro Yamada
Now that this directory contains only uniphier_sbc_boot_is_swapped(), move it to boot-device.c and delete the sbc/ directory entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11bus: uniphier-system-bus: move hardware init from board filesMasahiro Yamada
Move the bus initialization code to this driver from board files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11bus: uniphier-system-bus: add UniPhier System Bus driverMasahiro Yamada
Since commit 1517126fdac2 ("ARM: uniphier: select DM_ETH"), DM-based drivers/net/smc911x.c is compiled, but it is never probed because the parent node lacks the DM-based driver. I need a skeleton driver to populate child devices (but the next commit will move more hardware settings to the this driver). I put this to drivers/bus/uniphier-system-bus.c because this is the same path as the driver in Linux kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: remove support for NOR Flash on support cardMasahiro Yamada
I actually do not see this used these days because eMMC or NAND is used for non-volatile devices. Dump the burden to maintain this crappy code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: remove unused uniphier_sbc_init_admulti()Masahiro Yamada
This was used by the old sLD3 SoC, the support of which was removed by commit 00aa453ebf56 ("ARM: uniphier: remove sLD3 SoC support"). There is no more user of this function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: fix build error when CONFIG_MICRO_SUPPORT_CARD=nMasahiro Yamada
If CONFIG_MICRO_SUPPORT_CARD is unset, the build fails due to function redefinition. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: sync with Linux 5.8-rc4Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11ARM: uniphier: consolidate SoC select menuMasahiro Yamada
Currently, the supports for the following two ARMv7 SoC groups are exclusive, because the boot ROM loads the SPL to a different address: - LD4, sLD8 (SPL is loaded at 0x00040000) - Pro4, Pro5, PXs2, LD6b (SPL is loaded at 0x00100000) This limitation exists only when CONFIG_SPL=y. Instead of using crappy CONFIG options, checking SPL and SPL_TEXT_BASE is cleaner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-11Revert "ARM: uniphier: add weird workaround code for LD20"Masahiro Yamada
This reverts commit 45f41c134baf5ff1bbf59d33027f6c79884fa4d9. This weird workaround was the best I came up with at that time to boot U-Boot from TF-A. I noticed U-Boot successfully boots on LD20 (i.e. CA72 CPU) by using the latest TF-A. Specifically, since the following TF-A commit, U-Boot runs at EL2 instead of EL1, and this issue went away as a side-effect. |commit f998a052fd94ea082833109f25b94ed5bfa24e8b |Author: Masahiro Yamada <yamada.masahiro@socionext.com> |Date: Thu Jul 25 10:57:38 2019 +0900 | | uniphier: run BL33 at EL2 | | All the SoCs in 64-bit UniPhier SoC family support EL2. | | Just hard-code MODE_EL2 instead of using el_implemented() helper. | | Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0 | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> However, if I reverted that, this problem would come back, presumably because some EL1 code in U-Boot triggers this issue. Now that commit f8ddd8cbb513 ("arm64: issue ISB after updating system registers") fixed this issue properly, this weird workaround is no longer needed irrespective of the exception level at which U-Boot runs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-07-10Merge tag 'dm-pull-10jul20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata: better phandle and compatible-string support patman support for Python3 on Ubuntu 14.04 new checkpatch check to avoid #ifdefs
2020-07-10Merge tag 'rpi-next-2020.10' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi - add support for PCI and XHCI for RPi4 (64 bit only) - optionally reset XHCI device on registration - enable USB_KEYBOARD for rpi_4_defconfig
2020-07-10rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit)Marek Szyprowski
Create a non-cacheable mapping for the 0x600000000 physical memory region, where MMIO registers for the PCIe XHCI controller are instantiated by the PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM 32bit mode, this region is mapped at 0xff800000 CPU virtual address. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2020-07-10arm: provide a function for boards init code to modify MMU virtual-physical mapMarek Szyprowski
Provide function for setting arbitrary virtual-physical MMU mapping and cache settings for the given region. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10arm: update comments to the common styleMarek Szyprowski
Update the comments in include/asm/system.h to the common style. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-10arm: rpi: Add function to trigger VL805's firmware loadNicolas Saenz Julienne
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware may either be loaded directly from an EEPROM or, if not present, by the SoC's VideCore (the SoC's co-processor). Introduce the function that informs VideCore that VL805 may need its firmware loaded. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09arm: dts: include gpio nodes for card detectWalter Lozano
Several MMC drivers use GPIO for card detection with cd-gpios property in the MMC node pointing to a GPIO node. However, as U-Boot tries to save space by keeping only required nodes using u-boot* properties, several devices tree result in having only in the MMC node but not the GPIO node associated to cd-gpios. This patch, fixes several ocurrence of this issue. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2020-07-09sandbox: Move section u_boot_list to make it RWWalter Lozano
In order to be able to update data in u_boot_list, move this section to make it RW. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09drivers: rename drivers to match compatible stringWalter Lozano
When using OF_PLATDATA, the bind process between devices and drivers is performed trying to match compatible string with driver names. However driver names are not strictly defined, and also there are different names used when declaring a driver with U_BOOT_DRIVER, the name of the symbol used in the linker list and the used in the struct driver_info. In order to make things a bit more clear, rename the drivers names. This will also help for further OF_PLATDATA improvements, such as checking for valid driver names. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09sandbox: make RAM size configurableHeinrich Schuchardt
Up to now the RAM size of the sandbox is hard coded as 128 MiB. This does not allow testing the correct handling of addresses outside the 32bit range. 128 MiB is also rather small when tracing functions where the trace is written to RAM. Provide configuration variable CONFIG_SANDBOX_RAM_SIZE_MB to set the RAM size in MiB. It defaults to 128 MiB with a minimum of 64 MiB. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09sandbox: handling out of memoryHeinrich Schuchardt
assert() only works in debug mode. So checking a successful memory allocation should not use assert(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09arm: Remove mx31pdk boardJagan Teki
DM, OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Acked-by: Magnus Lilja <lilja.magnus@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove pengwyn boardJagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Lothar Felten <lothar.felten@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove pepper boardJagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Ash Charles <ash@gumstix.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove bav335x boardJagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Gilles Gameiro <gilles@gigadevices.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove cairo boardJagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09logicpd: Drop omap3 zoom1Jagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove overo boardJagan Teki
OF_CONTROL, DM_SPI and other driver model migration deadlines are expired for this board. Drop it. Cc: Ash Charles <ash@gumstix.com> Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove cm_t35 boardJagan Teki
DM, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09arm: Remove cm_t54 boardJagan Teki
DM, DM_SPI and other driver model migration deadlines are expired for this board. Remove it. Cc: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add two- and three-argument versions of CONFIG_IS_ENABLED in linux/kconfig.h - Adds a new feature which supports copying modified parts of the frame buffer to the uncached hardware buffer - Enable the copy framebuffer on various x86 targets
2020-07-09rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)Marek Szyprowski
Create a non-cacheable mapping for the 0x600000000 physical memory region, where MMIO registers for the PCIe XHCI controller are instantiated by the PCIe bridge. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09rpi4: shorten a mapping for the DRAMMarek Szyprowski
Remove the overlap between DRAM and device's IO area. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-07-09Merge tag 'for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for v2020.10 - Add support for I2C controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. - Add I2C controller support for Cortina Access CAxxxx SoCs - new rtc methods, rtc command, and tests - imx_lpi2c: Improve the codes to use private data - stm32f7_i2c.c: Add new compatible "st,stm32mp15-i2c" - stm32f7_i2c.c: Add Fast Mode Plus support - pwm: Add PWM driver for SiFive SoC
2020-07-09arm: kirkwood: add DT spi0 alias to LaCie boardsSimon Guinot
The spi0 alias is needed by the environment code to retrieve the SPI flash. This patch adds some -u-boot.dtsi files, providing the spi0 aliases, for all the following Kirkwood-based LaCie boards: - d2 Network v2 - Internet Space v2 - 2Big Network v2 - Network Space v2 - Network Space Lite v2 - Network Space Max v2 - Network Space Mini v2 Note that this -u-boot.dtsi files will be removed as soon as the spi0 aliases will be available in the upstream Linux dtsi files. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit (git 2.34.1) at 2025-01-25 15:49:14 +0000