| Age | Commit message (Collapse) | Author |
|---|
|
When building for a TPL/SPL setup (e.g. on the RK3368), we need the
TPL stage to have the extra space for for the 'Rockchip SPL name'
(i.e. 'RK33' word). Yet, the SPL will start execution at its first
word (i.e. the first word in the SPL binary needs to be a valid
instruction). To make things a bit more involved, CONFIG_SPL_BUILD
is defined both for the SPL and the TPL stage.
To avoid having to explicitly test for the first stage (TPL, if and
only if TPL and SPL are built, SPL otherwise), this commit modifies
the sequence to repeat the 'b reset' (instead of reserving 4 bytes
of undefined space) at the start of the boot0 hook: if overwritten
(and execution starts at the second word), the first instruction is
still a 'b reset'... if not overwritten, we start on a 'b reset' as
well.
This solution wouldn't even require the check whether we are in the
SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for
documentation purposes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Use mask to clear old setting before direct set the new config,
or else there it will mess up the config when it's not the same
with default value.
Fixes: 3851059 rockchip: Setup default PWM flags
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
Add regulator-init-microvolt for driver to init the regulator,
and the min output value is not 800000mV for the PWM2 io domain has
changed to VCC3V0 instead of VCC1V8 in rockchip evb, we need to
correct it with the value measured when PWM2 output HIGH.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
According to my test, some of firefly-rk3399 hang after dram init
when using ddr3-1333 config, while using ddr3-1600 config works
for all the board I have test.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.
phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.
Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
We are about to reuse the rockchip timer (header file) for 64bit ARMv8
chips, so it seems a good time to make the register sizes explicit by
changing from 'unsigned int' to 'u32'.
Reorders the header-includes in rk_timer.c to ensure that 'u32' is
definded before it is used by 'asm/arch/timer.h'.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
Add dwc2 node for fastboot to init dwc2 controller.
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
|
|
|
|
FMC driver is now able to discover the bank number by
parsing bank subnodes.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
Migrate all FMC defines from arch/arm/include/asm/arch-stm32f7/fmc.h
to drivers/ram/stm32_sdram.c
This will avoid to add an additionnal arch-stm32xx/fmc.h file when
a new stm32 family soc will be introduced.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
All drivers which was using clock_get() are now using
clk_get_rate() from clock framework, now it's safe to
remove clock_get().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
|
|
clean the code by removing unused enums, structs and
defines related to clocks
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
|
|
Add clock framework .get_rate callback.
This step will allow to convert all drivers which was using
proprietary clock_get() to use clock framework .get_rate().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
|
|
Also remove its declaration from stm32.h which
is no more needed.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
|
|
Use the same clocks macro than the one used by kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
|
|
The inline assembly functions in mon.c assume that the caller will
check for the return value in r0 according to regular ARM calling
conventions.
However, this assumption breaks down if the compiler inlines the
functions. The caller is then under no obligation to use r0 for the
result.
To fix this disconnect, we must explicitly move the return value
from the smc/bl call to the variable that the function returns.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
On early K2 devices (eg. K2HK) the secure ROM code does not support
loading secure code to firewall protected memory, before decrypting,
authenticating and executing it.
To load the boot monitor on these devices, it is necessary to first
authenticate and run a copy loop from non-secure memory that copies
the boot monitor behind firewall protected memory, before decrypting
and executing it.
On K2G, the secure ROM does not allow secure code executing from
unprotected memory. Further, ROM first copies the signed and encrypted
image into firewall protected memory, then decrypts, authenticates
and executes it.
As a result of this, we cannot use the copy loop for K2G. The
mon_install has to be modified to pass the address the signed and
encrypted secure boot monitor image to the authentication API.
For backward compatibility with other K2 devices and K2G GP,
the mon_install API still supports a single argument. In this case
the second argument is set to 0 by u-boot and is ignored by ROM
Signed-off-by: Thanh Tran <thanh-tran@ti.com>
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
|
|
This commit adds GPIO support to the Amlogic Meson pin controller
driver, based on code from Linux kernel.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
|
|
Import Amlogic Meson DTS files from Linux kernel version 4.12
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
|
As is often the case with SoC development, slightly different
products (i.e. different part number) are developed based on the
same silicon-die. Such fine grained information is unmaintainable.
Also, "SoC:" is a better fit that "CPU:".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
Add FPGA driver support for Arria 10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
|
|
Move FPGA driver which is Gen5 specific code into Gen5 driver file
and keeping common FPGA driver intact. All the changes are still keeping
in driver/fpga/ and no functional change. Subsequent patch would move
FPGA manager driver from arch/arm into driver/fpga/.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
|
|
Remove parameter from socfpga_bridges_reset(), and keeping this function
for single purpose which is just triggering reset on bridges.
socfpga_reset_deassert_bridges_handoff() can be called for releasing reset
on any bridges based on the bridge setting defined in fdt.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
|
|
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_FAT
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_SPI_FLASH
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Simon Glass <sjg@chromium.org>
|
|
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_MMC
CONFIG_ENV_IS_IN_NAND
CONFIG_ENV_IS_IN_UBI
CONFIG_ENV_IS_NOWHERE
In fact this already exists for sunxi as a 'choice' config. However not
all the choices are available in Kconfig yet so we cannot use that. It
would lead to more than one option being set.
In addition, one purpose of this series is to allow the environment to be
stored in more than one place. So the existing choice is converted to a
normal config allowing each option to be set independently.
There are not many opportunities for Kconfig updates to reduce the size of
this patch. This was tested with
./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC
And then manual updates. This is because for CHAIN_OF_TRUST boards they
can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic
now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
This patch fixes 2 bugs introduced by the following commit
2bb5b63 MIPS: bootm: rework and fix broken bootm code
The CONFIG_IS_ENABLED macro prepends 'CONFIG_' Hence, remove CONFIG_
from CONFIG_MIPS_BOOT_ENV_LEGACY usage.
Also, 2bb5b63 reworks bootm so that linux_env_legacy runs before
linux_cmdline_legacy. However, linux_env_legacy depends on
linux_cmdline_legacy running first as linux_cmdline_init initialilzes
linux_argp which linux_env_legacy later depends on during its
initialization.
Reorder the code so that linux_cmdline_legacy runs before
linux_env_legacy.
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
|
|
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.
Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:
8f998064 lw t9,-32668(gp)
0320f809 jalr t9
Without -fpic the call is simply:
0f803f01 jal be00fc04 <puts>
This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.
Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:
3c1c0004 lui gp,0x4
279c3384 addiu gp,gp,13188
0399e021 addu gp,gp,t9
Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.
This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.
Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: u-boot@lists.denx.de
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
|
|
The above CONFIG options are in Kconfig, and now have correct depends and
inter-dependencies. Migrate these to configs/ from include/configs/. In the
case of CMD_UBIFS also change it to be a default y if CMD_UBI.
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Fixes 4bd754d8abef ("arm: omap: Detect boot mode very early") where
the intent was to store the boot params information in a known
location and pass it to SPL very early. Unfortunately it didn't
account for OMAP3 boards.
This patch adds adds this functionality back into OMAP3 boards.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
|
|
commit 2eb48ff7a210d ("powerpc, 8260: remove support for mpc8260")
removed support for 8260 CPU.
This patch remove some remainders.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
Add missing .h and add missing declarations in .h
Declare local functions as static. Make interrupt_init_cpu function
signatures consistent with how decrementer_count is declared.
Based on warnings reported by 'make C=2'
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[trini: drop cpu_init_f as 8xx/83xx are different from the rest, rework
interrupt_init_cpu/decrementer_count]
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
Avoid unnecessary assembly functions when they can easily be written
in C.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
Avoid unnecessary assembly functions when they can easily be written
in C.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
Avoid unnecessary assembly functions when they can easily be written
in C.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
Avoid unnecessary assembly functions when they can easily be written
in C.
Also remove dc_read() as it is nowhere referenced
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
All complex case have been removed and we now only support
MPC866 and MPC885 families.
So check_CPU() can be made a lot simpler.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
reginfo command is calling mpc8xx_reginfo(), mpc85xx_reginfo()
or mpc86xx_reginfo() based on CONFIG_ symbol.
As those 3 functions can't me defined at the same time, let's
rename them print_reginfo() to avoid the #ifdefs
The name is kept generic as it is not at all dependent on
powerpc arch and any other arch could want to also print
such information.
In addition, as the Makefile compiles cmd/reginfo.c only when
CONFIG_CMD_REGINFO is set, there is no need to enclose the U_BOOT_CMD
definition inside a #ifdef CONFIG_CMD_REGINFO
Lets all remove the #ifdefs around the U_BOOT_CMD as this
file is only compiled when CONFIG_CMD_REGINFO is defined
Finally, this is a PowerPC-only command, disable it on a number of
non-PowerPC platforms.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
|
|
set_msr() and get_msr() are defined and used twice.
This patch moves them into ppc.h
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
In order to avoid TBU increment due to TBL reaching its max
and wrapping, reset TBL before resetting TBU
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
The actions inside #ifdef CONFIG_8xx in arch/powerpc/lib/time.c
can be performed before, in a 8xx dedicated function.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
This function has never been used, at least since the beginning
of the git repository
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
divider is calculated based on SCCR_DFBRG, with:
SCCR_DFBRG 00 => divider 1 = 1 << 0
SCCR_DFBRG 01 => divider 4 = 1 << 2
SCCR_DFBRG 10 => divider 16 = 1 << 4
SCCR_DFBRG 11 => divider 64 = 1 << 6
This can be easily converted to a single shift operation:
divider = 1 << (SCCR_DFBRG * 2)
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
|
|
Similar to what is done with OMAP5 class boards we need to
perform fixups common to this SoC class, add support for this here
and add HS fixups.
Signed-off-by: Andrew F. Davis <afd@ti.com>
|
|
If a firmware node is already present in the FDT we will fail to create
one and so fail to add our OP-TEE node, make this fixup first check for
a firmware node and then only try to add one if it is not found.
Signed-off-by: Andrew F. Davis <afd@ti.com>
|
|
Some of the fixups currently done for OMAP5 class boards are common to
other OMAP family devices, move these to fdt-common.c.
Signed-off-by: Andrew F. Davis <afd@ti.com>
|
|
TEE loading and firewall setup are common to all omap2 devices, move
these function out of omap5 and into mach-omap2. This allows us
to use these functions from other omap class devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
|
