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These functions relate to memory init so move them into the init
header.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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When SPL boots, enable green led on the board.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for qspi memory on board. Created boot support for QSPI
for both u-boot proper and SPL.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for SPL for this board: DRAM initialization, PMC initialization,
MMC boot.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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