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2009-01-2385xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boardsKumar Gala
Introduce a new define to seperate out the virtual address that PCI memory is at from the physical address. In most situations these are mapped 1:1. However any code accessing the bus should use VIRT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-2385xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala
Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-01-2385xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala
Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
2009-01-13Change PCIE1&2 deciide logic on MPC8544DS board more readableRoy Zang
The IO port selection for MPC8544DS board: Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 This patch changes the PCIE12 and PCIE2 logic more readable. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13Fix IO port selection issue on MPC8544DS and MPC8572DS boardsRoy Zang
The IO port selection is not correct on MPC8572DS and MPC8544DS board. This patch fixes this issue. For MPC8572 Port cfg_io_ports PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf PCIE2 0x3, 0x7 PCIE3 0x7 For MPC8544 Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2008-12-0385xx: remove the unused ddr_enable_ecc in the board fileDave Liu
The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2008-11-02Coding Style cleanup, update CHANGELOGWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-2485xx: Convert all fsl_pci_init users to new APIsKumar Gala
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-18Pass dimm parameters to populate populate controller optionsHaiying Wang
Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-02Moved initialization of RTL8139 Ethernet controller to board_eth_init()Ben Warren
Affected boards: hidden_dragon MPC8544DS MPC8610HPCN R2DPLUS TB0229 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02Add SGMII support for the 8544 DSAndy Fleming
The 8544 DS has an optional SGMII Riser card, which uses different PHY addresses. Check if we are in SGMII mode, and invoke the SGMII Riser setup code if so. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-27FSL DDR: Convert MPC8544DS to new DDR code.Kumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-10mpc85xx: workaround old binutils bugKumar Gala
The recent change to move the .bss outside of the image gives older binutils (ld from eldk4.1/binutils-2.16) some headache: ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4) ppc_85xx-ld: final link failed: Bad value We workaround it by being explicit about the program headers and not assigning the .bss to a program header. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-31mpc85xx: Update linker scripts for Freescale boardsKumar Gala
* Move to using absolute addressing always. Makes the scripts a bit more portable and common * Moved .bss after the end of the image. These allows us to have more room in the resulting binary image for code and data. * Removed .text object files that aren't really needed * Make sure _end is 4-byte aligned as the .bss init code expects this. (Its possible that the end of .bss isn't 4-byte aligned) Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14MPC8544DS: Add ATI Video card supportKumar Gala
Add support for using a PCIe ATI Video card on PCIe2. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14MPC8544DS: Report board id, board version and fpga version.Kumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14Remove LBC_CACHE_BASE from 8544 DSAndy Fleming
The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping space for some anyway, we were allowing speculative loads into unmapped space, which would cause an exception (annoying, even if ultimately harmless). Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the problem. Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-11Fix some more print() format errors.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02Cleanup out-or-tree building for some boards (.depend)Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-12Change initdram() return type to phys_size_tBecky Bruce
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-1185xx/86xx: Move to dynamic mgmt of LAWsKumar Gala
With the new LAW interface (set_next_law) we can move to letting the system allocate which LAWs are used for what purpose. This makes life a bit easier going forward with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com> Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-1185xx: remove dummy board_early_init_fKumar Gala
A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-1185xx: Remove unused and unconfigured memory test code.Kumar Gala
Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-21Big white-space cleanup.Wolfgang Denk
This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26MPC8544DS: decode pcie3 end-point configuration correctly.Ed Swarthout
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17Remove all the search paths from the .lds files.Jason Wessel
The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2008-03-2685xx: Add the concept of CFG_CCSRBAR_PHYSKumar Gala
When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-05Remove erroneous or extra spd.h #includers.Jon Loeliger
Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-01-1785xx: Convert MPC8544 DS to new TLB setupKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-1685xx: convert MPC8544 DS over to use new LAW init codeKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-13MPC8544DS: fix board Makefile for silent build (with -s)Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-12Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk
With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-01-09Reworked FSL Book-E TLB macros to be more readableKumar Gala
The old macros made it difficult to know what WIMGE and perm bits were set for a TLB entry. Actually use the bit masks for these items since they are only a single bit. Also moved the macros into mmu.h out of e500.h since they aren't specific to e500. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xxKumar Gala
We already had defines for LAWAR_TRGT_IF_* that we should use rather than creating new ones. Also, added some missing defines for PCIE targets. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Stop using immap_t for guts offset on 85xxKumar Gala
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers instead of getting it via &immap->im_gur. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11Update MPC8544DS to use libfdtKumar Gala
Updated the MPC8544DS config to use libfdt and assume use of aliases for ethernet, pci, and serial for the various fixups that are done. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-11-18Fix compiler warnings for PPC systems. Update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-09-04Fix ULI RTC support on MPC8544 DSKumar Gala
The RTC on the M1575 ULI chipset requires a dummy read before we are able to talk to the RTC. We accomplish this by adding a second memory region to the PHB the ULI is on and read from it. The second region is added to maintain compatiabilty with Linux's view of the PCI memory map. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-04ft_board_setup update 85xx/86xx of pci/pcie bus-range property.Ed Swarthout
pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-08-29support board vendor-common makefilesKim Phillips
if a board/$(VENDOR)/common/Makefile exists, build it. also add the first such case, board/freescale/common/Makefile, to handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as dictated by board configuration. thusly get rid of alternate build dir errors such as: FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory by putting the common/ mkdir command in its proper place (the common Makefile). Common bits from existing individual board Makefiles have been removed. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2007-08-16Update MPC8544 DS PCI memory mapKumar Gala
The PCIe bus that the ULI M1575 is connected to has no possible way of needing more than the fixed amount of IO & Memory space needed by the ULI. So make it use far less IO & memory space and have it use the shared LAW. This free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed by each bus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-16Fix up some fdt issues on 8544DSKumar Gala
It looks like we had a merge issue that duplicated a bit of code in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get the MAC address properly set in the device tree on boot for TSEC1 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-148544ds PCIE supportEd Swarthout
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address. Enable LBC and ECM errors and clear error registers. Add tftpflash env var to get uboot from tftp server and flash it. Add pci/pcie convenience env vars to display register space: "run pcie3regs" to see all pcie3 ccsr registers "run pcie3cfg" to see all cfg registers Whitespace cleanup and MPC8544DS.h Enable CONFIG_INTERRUPTS. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
2007-07-118544ds: Fix Makefile after moving pixis to board/freescale.Ed Swarthout
The OBJTREE != SRCTREE build scenario was broken. This fixes it. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-05-05Coding stylke cleanup; update CHANGELOG.Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2007-04-23Add MPC8544DS basic port board files.Jon Loeliger
Add board port under new board/freescale directory structure and reuse existing PIXIS FPGA support there. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>