Age | Commit message (Expand) | Author |
2014-05-16 | board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL | Prabhakar Kushwaha |
2013-11-25 | Driver/DDR: Moving Freescale DDR driver to a common driver | York Sun |
2013-08-09 | powerpc/mpc8xxx: Add memory reset control | York Sun |
2013-07-24 | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk |
2013-02-04 | ppc: Move lbc_clk and cpu to arch_global_data | Simon Glass |
2012-07-06 | powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER() | York Sun |
2011-04-04 | powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB | Poonam Aggrwal |
2011-04-04 | powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb | Priyanka Jain |
2011-04-04 | powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h> | Kumar Gala |
2011-04-04 | powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init | Kumar Gala |
2011-01-14 | mpc85xx boards: initdram() cleanup/bugfix | Becky Bruce |
2010-06-29 | 85xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHz | Poonam Aggrwal |
2009-10-27 | 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data rate | Poonam Aggrwal |
2009-10-27 | 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB. | Poonam Aggrwal |
2009-09-24 | ppc/85xx: 32bit DDR changes for P1020/P1011 | Poonam Aggrwal |
2009-09-08 | ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist | Kumar Gala |
2009-08-28 | 85xx: Add support for P2020RDB board | Poonam Aggrwal |