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2012-10-29ColdFire: Update the lds file for M54418TWR board.Jason Jin
The M54418TWR lds file need to update since commit: 8b493a52367623f36e628e4ab2cf8ee082b655e0 common: Discard the __u_boot_cmd section The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-24ColdFire: Add Freescale MCF54418TWR ColdFire development board supportAlison Wang
Add Freescale MCF54418TWR ColdFire development board support. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-22Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xxTom Rini
2012-10-22powerpc/t4qds: Add T4QDS boardYork Sun
The T4240QDS is a high-performance computing evaluation, development and test platform supporting the T4240 QorIQ Power Architecture™ processor. SERDES Connections 32 lanes grouped into four 8-lane banks Two “front side” banks dedicated to Ethernet Two “back side” banks dedicated to other protocols DDR Controllers Three independant 64-bit DDR3 controllers Supports rates up to 2133 MHz data-rate Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller QIXIS System Logic FPGA Each DDR controller has two DIMM slots. The first slot of each controller has up to 4 chip selects to support single-, dual- and quad-rank DIMMs. The second slot has only 2 chip selects to support single- and dual-rank DIMMs. At any given time, up to total 4 chip selects can be used. Detail information can be found in doc/README.t4qds Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22board/freescale/common: VSC3316/VSC3308 initialization codeShaveta Leekha
Add code for configuring VSC3316/3308 crosspoint switches Add README to understand the APIs - VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch capable of data rates upto 11.5Gbps. VSC3316 has 16 input and 16 output ports whereas VSC3308 has 8 input and 8 output ports. Programming of these devices are performed by two-wire or four-wire serial interface. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22powerpc/board: add present2 register definition for QIXISShengzhou Liu
According to new QIXIS system definition, update QIXIS registers set to add present2 register instead of obsolete ctl_sys2. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22common: Discard the __u_boot_cmd sectionMarek Vasut
The command declaration now uses the new LG-array method to generate list of commands. Thus the __u_boot_cmd section is now superseded and redundant and therefore can be removed. Also, remove externed symbols associated with this section from include/command.h . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22common: Add .u_boot_list into all linker filesMarek Vasut
Add section for the linker-generated lists into all possible linker files, so that everyone can easily use these lists. This is mostly a mechanical adjustment. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22board/freescale/common:QIXIS:Fix magic number usagePrabhakar Kushwaha
QIXIS FPGA layout defines the address of registers but The actual register bit implementation is board-specific, So avoid use of magic numbers as it may vary across different boards's QIXIS FPGA implementation. Also, Avoid board specific defines in common/qixis.h Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-19ColdFire: Fix the build error for Freescale m5282evb board.Jason Jin
Clean up the lds file and fix the environment build error. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-15mx6qsabreauto: Add Ethernet supportFabio Estevam
mx6qsabreauto has a AR8031 Gigabit PHY. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15mx31: Fix PDR0_CSI_PODFBenoît Thébaudeau
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0 register is actually composed of two bit-fields: one pre-divider and one post-divider. This patch fixes the CCM access macros and the code using them accordingly. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
2012-10-15mx5/6: Define default SoC input clock frequenciesBenoît Thébaudeau
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15mx6q: Add basic support for mx6qsabreautoFabio Estevam
mx6qsabreauto is a board based on mx6q SoC with the following features: - 2GB of DDR3 - 2 USB ports - 1 HDMI output port - SPI NOR - 2 LVDS LCD ports - Gigabit Ethernet - Camera - eMMC and SD card slot - Multichannel Audio - CAN - SATA - NAND - PCIE - Video Input Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15mx6qsabresd: Add 8-bit USDHC supportFabio Estevam
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15mx6qsabresd: Add Ethernet supportFabio Estevam
mx6qsabresd has a AR8031 Gigabit PHY. Add support for it. Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail. Tested on 1Gbp and 100Mbps networks. Suggested-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-15mx6: Add basic support for mx6qsabresd board.Fabio Estevam
mx6qsabresd is a board based on mx6q SoC with the following features: - 1GB of DDR3 - 1 USB OTG port - 1 HDMI output port - SPI NOR - LVDS panel - Gigabit Ethernet - Camera Connector - eMMC and SD card slot - Audio Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15mx6q: Factor out common DDR3 init codeFabio Estevam
Factor out common DDR3 initialization code, allowing easier maintainance of such scripts. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-30Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD
2012-09-25Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini
2012-09-24mx28evk: Remove fecmxc_mii_postcall()Fabio Estevam
fecmxc_mii_postcall() is specific to the KSZ9021 PHY on m28evk and should not be used on mx28evk, which has LAN8270 instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2012-09-23mx51evk: Add CONFIG_REVISION_TAGBenoît Thébaudeau
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information. If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay. Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com> Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-21Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2012-09-20ColdFire: Clean up checkpatch warnings for MCF54451 and MCF54455Alison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20ColdFire: Clean up checkpatch warnings for MCF547x and MCF548xAlison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20ColdFire: Clean up checkpatch warnings for MCF523xAlison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20ColdFire: Clean up checkpatch warnings for MCF532x/MCF537x/MCF5301xAlison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20ColdFire: Clean up checkpatch warnings for MCF52x2Alison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20ColdFire: Clean up checkpatch warnings for MCF5227xAlison Wang
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-18mpc8308rdb: add support for eSDHC MMC controllerIra W. Snyder
Add support for the onboard eSDHC MMC controller. The hardware on the MPC8308RDB has the following errata: - ESDHC111: manual asynchronous CMD12 is broken - DMA is broken (PIO works) Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> [added include fsl_esdhc header to prevent implicit declarations of fsl_esdhc_mmc_init() and fdt_fixup_esdhc()] Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-09-18mpc8308rdb: add support for Spansion SPI flash on header J8Ira W. Snyder
The SPI pins are routed to header J8 for testing SPI functionality. A Spansion flash has been wired up and tested on this header. This patch breaks support for the second TSEC interface, since the GPIO pin used as a chip select is pinmuxed with some of the TSEC pins. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-09-17mx35pdk: README: Remove NAND referencesFabio Estevam
Booting from NAND is currently not supported, so remove its references. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-10MX35: mx35pdk: add support for MMCStefano Babic
Add support for SD card and change the default environment due to increased u-boot size. Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-10mx6qsabrelite:Use IMX_GPIO_NR MacroAshok Kumar Reddy
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
2012-09-04mx28evk: Convert to mxs_adjust_memory_params()Fabio Estevam
Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params missed to update mx28evk, which caused the board not to boot. Apply the conversion so that the board can boot again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2012-09-04MX28: mx28evk: Align SSP clock speedOtavio Salvador
Align the SSP clock speed with oscilator to achieve higher transfer stability. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
2012-09-01fsl_esdhc: Remove cache snooping for i.MXBenoît Thébaudeau
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01mx5:Use IMX_GPIO_NR macroAshok Kumar Reddy
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
2012-09-01mx6qarm2:Use IMX_GPIO_NR macroAshok Kumar Reddy
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'Otavio Salvador
The DRAM initialization, after SPL has complete, is exactly the same for all mxs SoCs so we should name it accordinly. The following boards has been changed: * apx4devkit * m28evk * mx28evk * sc_sps_1 Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
2012-09-01mx53ard: Use IMX_GPIO_NR macroFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01mx51evk: Use IMX_GPIO_NR macroFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01mx53loco: Use IMX_GPIO_NR macroFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01MX: Set a common gpio.h for all i.MXStefano Babic
Each i.MX has its own gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Matt Sealey <matt@genesi-usa.com>
2012-09-01mx53evk: add boot_mode supportTroy Kisky
This allows a watchdog reset to start the ROM's usb/serial downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01mx6qsabrelite: add boot_mode supportTroy Kisky
This allows a watchdog reset to start the ROM's usb downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01iomux: move IOMUX_GPR13_xxx definesTroy Kisky
Move mx6 specific defines to arch-mx6 directory. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01mx35: Fix typo on EDIOBenoît Thébaudeau
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01MX28: Move the u-boot.bd info CPUDIR/SOCDIRMarek Vasut
This gets us rid of duplication of the same file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01mx51evk: do not overwrite the consoleFabio Estevam
On this board, the console is always set to the serial line. Do not allow to overwrite it when video is enabled. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
generated by cgit (git 2.34.1) at 2025-01-09 10:40:37 +0000