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2017-09-18imx: imx7d: remove CamelCase from ENET_xMHz macrosEric Nelson
Update these macros to use all upper-case to avoid checkpatch warnings: ENET_25MHz, ENET_50MHz, ENET_125MHz, Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-09-11armv8: ls1088aqds: Add support of EC1 and EC2Prabhakar Kushwaha
EC1 and EC2 are RGMII interface on ls1088aqds platform. This patch add support of RGMII with PHY and MDIO Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: fsl-layerscape: Support to add RGMII for ls1088aqdsAshish Kumar
This patch adds support for RGMII protocol NXP's LDPAA2 support RGMII protocol. LS1088A is the first Soc supporting both RGMII and SGMII. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088aqds: Add support of LS1088AQDSAshish Kumar
This patch add support of LS1088AQDS platform. The LS1088A QorIQTM Development System (QDS) is a high-performance computing, evaluation, and development platform that supports the LS1088A QorIQ Architecture processor. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11armv8: ls1088ardb: Add support for LS1088ARDB platformAshish Kumar
LS1088A is an ARMv8 implementation. The LS1088ARDB is an evaluatoin platform that supports the LS1088A family SoCs. This patch add basic support of the platform. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Disabled NAND in board header file] Reviewed-by: York Sun <york.sun@nxp.com> WIP: disable NAND for LS1088ARDB
2017-09-11armv8: LS2080ARDB: Add secure boot defconfig for QSPI boot.Udit Agarwal
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: dropped redundant commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11LS2080ARDB: QSPI boot: Secure Boot image validationUdit Agarwal
Adds header address for PPA to be validated during ESBC phase for ARCH_LS2088 and QSPI_BOOT. Moves sec_init prior to ppa_init(). It must be initialized before the PPA. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-11fsl-layerscape: Consolidate registers space defination for CCI-400 busAshish Kumar
CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <york.sun@nxp.com>
2017-09-07armv8: ls1043/ls1046aqds: add support for RGMII_TXIDMadalin Bucur
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: York Sun <york.sun@nxp.com>
2017-08-28imx: imx6: Move gpr_init() function to soc.cBreno Lima
Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D, MX6Q and MX6QP processors move it to the soc.c file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-08-18m68k: mcf5445x: move early ddr init as board-specificAngelo Dureghello
For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init is required. This patch moves this ddr/sdram early initalization away from start.S (to be board related). Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2017-08-16Merge git://www.denx.de/git/u-boot-imxTom Rini
Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-16env: Rename some other getenv()-related functionsSimon Glass
We are now using an env_ prefix for environment functions. Rename these other functions as well, for consistency: getenv_vlan() getenv_bootm_size() getenv_bootm_low() getenv_bootm_mapsize() env_get_default() Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass
We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename common functions related to setenv()Simon Glass
We are now using an env_ prefix for environment functions. Rename these commonly used functions, for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename setenv() to env_set()Simon Glass
We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16mx6sabreauto: Fix IOMUXC_GPR6 and IOMUXC_GPR7 valuesBreno Lima
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as commented in the code: /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F. Signed-off-by: Breno Lima <breno.lima@nxp.com>
2017-08-16mx6sabresd: Fix IOMUXC_GPR6 and IOMUXC_GPR7 valuesBreno Lima
The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as commented in the code: /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F. Signed-off-by: Breno Lima <breno.lima@nxp.com>
2017-08-15env: Add an enum for environment stateSimon Glass
At present we have three states for the environment, numbered 0, 1 and 2. Add an enum to record this to avoid open-coded values. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-15Move environment files from common/ to env/Simon Glass
About a quarter of the files in common/ relate to the environment. It seems better to put these into their own subdirectory and remove the prefix. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-13spl: add hierarchical defaults for SPL_LDSCRIPTPhilipp Tomsich
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-09fsl-lsch2: csu: correct the workaround A-010315Hou Zhiqiang
The implementation of function set_pcie_ns_access() uses a wrong argument. The structure array ns_dev has a member 'ind' which is initialized by CSU_CSLX_*. It should use the 'ind' directly to address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*). Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board: ls2080ardb: Add fsl_fdt_fixup_flashSantan Kumar
IFC and QSPI are muxed on board. Add fsl_fdt_fixup_flash() to disable IFC node in dts if QSPI is enabled, or disable QSPI node in dts if otherwise. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09fsl-lsch2: csu: remove multiple calling functionHou Zhiqiang
Function enable_layerscape_ns_access() is alreayd called soc-wide. Remove duplicated calling from individual boards. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Add commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board:ls2080ardb: Update execution of config_board_muxSantan Kumar
Function config_board_mux() reads env variable 'hwconfig' which is only available after relocation for QSPI boot. Move calling config_board_mux() to misc_init_r(). Signed-off-by: Santan Kumar <santan.kumar@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09board/ls2080ardb: Disable SD-related GPIO programmingSantan Kumar
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB RevF boards. It is only used on LS2081ARDB. Programming GPIO is only required for LS2081ARDB. Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09armv8: ls1046ardb: update core frequency to 1800MHZQianyu Gong
Update the default core frequency to 1800MHZ for best performance under SD boot and eMMC boot. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-03qemu-ppce500: Update get_phys_ccsrbar_addr_early()Tom Rini
The logic of what fdt_get_base_address() will search for and return has changed. Rework get_phys_ccsrbar_addr_early() to perform the logic that fdt_get_base_address used to perform. Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-01arm64: ls1043ardb: Add distro secure boot supportSumit Garg
Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment. Disable fall back option to nor/qspi boot in case of secure boot. Also enable "secureboot=y" flag in environment for ARM based platforms instead of bootcmd. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Tested-by: Vinitha Pillai <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-07-25Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-07-13mx6sabreauto: Make Ethernet functional againFabio Estevam
Since commit ce412b79e7255770 ("drivers: net: phy: atheros: add separate config for AR8031") Ethernet does not work on mx6sabreauto. This commit correctly assigns ar8031_config() as the configuration function for AR8031 in the same way as done in the Linux kernel. However, on mx6sabreauto design we need some additional configurations, such as enabling the 125 MHz AR8031 output and setting the TX clock delay that need to be done in the board file. This is the equivalent fix from commit 4b6035da482c ("mx6sabresd: Make Ethernet functional again"). Reported-by: Miquel RAYNAL <miquel.raynal@free-electrons.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12mx6sabreauto: Add Falcon mode supportDiego Dorta
Add support for Falcon mode and explain in the README the steps to boot the kernel directly without loading the full U-Boot. Signed-off-by: Diego Dorta <diego.dorta@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12mx6sabreauto: Do not enable WEIM by defaultFabio Estevam
WEIM cannot be used when I2C3 is enabled due to pin conflict, so keep WEIM disabled by default. I2C3 controls GPIO I2C expander (USB host and OTG have VBUS controlled by the GPIO I2C expander), magnetometer, accelerometer. Not disabling WEIM in U-Boot causes I2C3 to behave badly when booting a NXP 4.1 kernel, which leads to probe failure on several devices, including the lack of USB: imx_usb 2184000.usb: Can't register ci_hdrc platform device, err=-517 By keeping WEIM disabled in U-Boot these kernel issues are gone. Reported-by: Takashi Matsuzawa <tmatsuzawa@xevo.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-07-12imx: reorganize IMX code as other SOCsStefano Babic
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-12mx6sabreauto: Update to SPL only modeVanessa Maegima
As mx6sabreauto supports SPL now, all variants can boot using the same defconfig. This patch: - Removes non-SPL targets. - Renames target to mx6sabreauto_defconfig. - Renames folder and board files to mx6sabreauto. - Updates MAINTAINERS, Makefile and Kconfig accordingly. - Removes .cfg files. - Adds a README with instructions to build and flash SPL and u-boot.img. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12mx6qsabreauto: Add SPL supportVanessa Maegima
Add support for mx6q, mx6dl and mx6qp sabreauto boards in SPL. Retrieved the mx6q DCD table from: board/freescale/mx6qsabreauto/imximage.cfg Retrieved the mx6dl DCD table from: board/freescale/mx6qsabreauto/mx6dl.cfg Retrieved the mx6qp DCD table from: board/freescale/mx6qsabreauto/mx6qp.cfg Flashed SPL and u-boot.img to an SD card and could successfully boot it on mx6q, mx6qp and mx6dl sabreauto boards. Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-07-12mx7dsabresd: Set VLD04 output to 2.8V in PMIC initialization.Gautam Bhat
This change sets the VLDO4 settings output to 2.8V in PMIC initialization so that the MIPI DSI/CSI input voltage is 2.8V as per the schematics. The original code provides an output of 3.3V which violates the voltage mentioned in the schematics. Signed-off-by: Gautam Bhat <mindentropy@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-06-27Merge git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
2017-06-16powerpc, 5xxx, 512x: remove support for mpc5xxx and mpc512xHeiko Schocher
There was for long time no activity in the mpx5xxx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in mpc5xxx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
2017-06-16treewide: remove unneeded semicolonsMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-06-12powerpc: fsl: Update maintainersYork Sun
Update maintainers for B4860QDS, P1010RDB, P1_TWR, T104xRDB. Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8569mds: Update config and maintainerYork Sun
Enable DHCP command by default. Update maintainer info. Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8568mds: Update board configYork Sun
Enable DHCP command by default. Move environmental variable location to before U-Boot image. Enlarge reserved mem for malloc. Update maintainer. Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8536ds: Update maintainerYork Sun
Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8544ds: Update maintainerYork Sun
Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8548cds: Update maintainerYork Sun
Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc86xx: Update maintainer for MPC8610HPCD and MPC8641HPCNYork Sun
Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc85xx: Update maintainer for MPC8541CDS and MPC8555CDSYork Sun
Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-12powerpc: mpc8540ads: mpc8560ads: Drop support for MPC8540/60ADSYork Sun
Drop support for these two legacy boards. Signed-off-by: York Sun <york.sun@nxp.com>
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass
The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>