summaryrefslogtreecommitdiff
path: root/board/freescale
AgeCommit message (Collapse)Author
2018-02-04mx6memcal: enable SDP supportEric Nelson
The initial implementation of mx6memcal reset the CPU after running the memory calibration procedure because the generic board has no information about which boot devices are available. Now that we have SDP support in SPL, use it to allow a full U-Boot to be uploaded (i.e. to use "mtest"). Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04arm: imx: mx53loco: remove usage of mx53_dram_sizePatrick Bruenn
Static variables are not available during board_init_f(). 'static uint32_t mx53_dram_size[2];' was used in board specific dram_init(), dram_init_banksize() and get_effective_memsize() to avoid multiple calls to get_ram_size(). Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-01-30armv8: ls2088ardb: Add 3DS RDIMM supportYork Sun
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4 DDR chips. LS2088ARDB needs to be modified to connect all DQS signals. Some of them are grounded by default for x8 chips. Tested with RDIMM MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support RDIMM. Dropped related timing table. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30armv8: ls1046ardb: Add RDIMM supportYork Sun
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM MTA18ASF2G72PDZ and MTA9ASF1G72PZ. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-23fsl: common: qixis: Add ifc and emmc switching via qixisAshish Kumar
Currently only SD, NAND can be secondary boot sources controlled by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR can be secondary boot source, while QSPI-NOR is the primary. Add options in qixis to switch to other boot sources including ifc and emmc. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23armv8: ls1088a: vid: Compiling VID specific functions for SPLRajesh Bhagat
Enables and compiles VID specific functions for SPL. Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ls1088a: Add VID support for QDS and RDB platformsRajesh Bhagat
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems. It reads the fusesr register and changes the VDD accordingly by adjusting the voltage via LTC3882 regulator. This patch also takes care of the special case of 0.9V VDD is present in fusesr register. In that case,it also changes the SERDES voltage by disabling the SERDES, changing the SVDD and then re-enabling SERDES. Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23common: board_f: vid: Add VID specific API to adjust core voltageRajesh Bhagat
Adds a VID specific API in init_sequence_f and spl code flow namely init_func_vid which is required to adjust core voltage. VID specific code is required in spl, hence moving flag CONFIG_VID out of spl flags. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23ls1088a: ddr: configure DDR for 0.9v for VID supportRajesh Bhagat
When VID feature is supported, check the contents of fuse register and configure DDR operate at 0.9v. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Add support for LTC3882 voltage regulator chipRajesh Bhagat
Restructures common driver to support LTC3882 voltage regulator chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23Kconfig: Add LTC3882 voltage regulator configRajesh Bhagat
Adds below LTC3882 voltage regulator config: CONFIG_VOL_MONITOR_LTC3882_READ CONFIG_VOL_MONITOR_LTC3882_SET Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Move IR chip specific code in flagRajesh Bhagat
Moves IR chip (IR36021) specific code in flag to resolve compilation issue where it is not present. For example, LS1088A is having a new LTC3882 voltage chip. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common: vid: Add board specific vdd adjust APIRajesh Bhagat
Adds a board specific API namely board_adjust_vdd which is required to define the board VDD adjust settings. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23board: common:vid: Add LS1088A VID Supported voltage valuesRajesh Bhagat
Adds below voltage values supported by LS1088A Soc: 1.025V(default), 0.9875V, 0.9750V, 0.9V, 1.0V, 1.0125V, 1.0250V. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-19powerpc: Drop unreferenced CONFIG_* definesTuomas Tynkkynen
The following config symbols are only defined once and never referenced anywhere else: CONFIG_CYRUS CONFIG_IDS8313 CONFIG_MPC8308_P1M CONFIG_MPC8308RDB CONFIG_MPC8349EMDS CONFIG_MPC8349ITXGP CONFIG_SBC8349 CONFIG_SBC8548 CONFIG_SBC8641D CONFIG_TQM834X CONFIG_VE8313 CONFIG_XPEDITE5140 CONFIG_XPEDITE5200 CONFIG_XPEDITE550X Most of them are config symbols named after the respective boards which seems to have been a standard practice at some point. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Acked-by: Mario Six <mario.six@gdsys.cc>
2018-01-19m68k: Drop unreferenced CONFIG_* definesTuomas Tynkkynen
The following config symbols are only defined once and never referenced anywhere else: CONFIG_AMCORE CONFIG_ASTRO5373L CONFIG_M52277EVB CONFIG_M5253DEMO CONFIG_M5253EVBE CONFIG_M5275EVB CONFIG_M54418TWR CONFIG_STMARK2 Most of them are config symbols named after the respective boards which seems to have been a standard practice at some point. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-17Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2018-01-17freescale: Ensure common commands are not included in SPL binaryTom Rini
Both the "qixis_reset" and esbc_validate" commands can only be used in full U-Boot so do not build them in SPL. As part of this rework the qixis code to declare things as static and make use of __weak for function aliases. Cc; York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15arm: ls1021atwr: Rework local commands to not be included in SPLTom Rini
Move some of the code for the "lane_bank" and "cpld" code local commands so that they are not built for SPL as they can only be used in full U-Boot. This means we can mark a few functions as static as well now. Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Tested-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15powerpc: P1010RDB: Rework local command to not be included in SPLTom Rini
Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so it is not included in SPL. Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
2018-01-15board/ls2081ard: Correct code to get QMAP value in checkboardPriyanka Jain
QMAP value contains information about QSPI chip-selects. These bits are used to display information of boot device in checkboard() function. QMAP value is stored in most significant 3-bits of 8-bit register brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using below logic: (brdcfg[0] >> 5) & 0x7 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15board/ls2081ardb: Update board related printsPriyanka Jain
Remove Board Arch print as its value is always constant '1' and does not contain any important information to display during boot. Add print to display Board FPGA version. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITESumit Garg
As part of chain of trust with confidentiality along with distro boot, linux kernel image needs to be stored in encrypted form on ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of Secure boot on ARM based platforms. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15board: ls1012a: LS1012A-2G5RDB board supportBhaskar Upadhaya
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-12mx6memcal: spl: Disambiguate the error messageFabio Estevam
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration() show the same error message, which is confusing for debugging. Disambiguate the mmdc_do_dqs_calibration() error message. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12mx6memcal: spl: Also take i.MX6ULL into accountFabio Estevam
i.MX6ULL also does not support 64-bit DDR bus, so add it to the check logic. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12mx6memcal: Fix the UART ports for mx6sabresd/auto boardsFabio Estevam
mx6sabresd board uses the following pins for console: PAD_CSI0_DAT10__UART1_TX_DATA PAD_CSI0_DAT11__UART1_RX_DATA ,so put it in the same config option as wandboard. mx6sabreauto board uses the following pins for console: PAD_KEY_COL0__UART4_TX_DATA PAD_KEY_ROW0__UART4_RX_DATA So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option. The config option for sabreauto can be added later when needed. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: config wdog pinmuxPeng Fan
Because kernel set WDOG_B mux before pad with the common pinctrl framwork now and wdog reset will be triggered once set WDOG_B mux with default pad setting, we set pad setting here to workaround this. Since imx_iomux_v3_setup_pad also set mux before pad setting, we set as GPIO mux firstly here to workaround it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12imx: mx6sxsabresd: Enable DM driverPeng Fan
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers. There are some dependency, such as when DM MMC enabled, USB compile error. Also the i.MX I2C MMC DM driver does not support legacy GPIO interface. So enable them all together. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12board: freescale: common: add pfuze dm codePeng Fan
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-10ls1088ardb: Add SD Secure boot target supportSumit Garg
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [YS: run moveconfig.py -s] Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10armv8: ls1088a: SPL size reductionSumit Garg
Using changes in this patch we were able to reduce approx 8k size of u-boot-spl.bin image. Following is breif description of changes to reduce SPL size: 1. Changes in board/freescale/ls1088a/Makefile to remove compilation of eth.c and cpld.c in case of SPL build. 2. Changes in board/freescale/ls1088a/ls1088a.c to keep board_early_init_f funcations in case of SPL build. 3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver specific macros due to which static data was being compiled in case of SPL build. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10drivers/misc: Share qbman init between archsAhmed Mansour
This patch adds changes necessary to move functionality present in PowerPC folders with ARM architectures that have DPAA1 QBMan hardware - Create new board/freescale/common/fsl_portals.c to house shared device tree fixups for DPAA1 devices with ARM and PowerPC cores - Add new header file to top includes directory to allow files in both architectures to grab the function prototypes - Port inhibit_portals() from PowerPC to ARM. This function is used in setup to disable interrupts on all QMan and BMan portals. It is needed because the interrupts are enabled by default for all portals including unused/uninitialised portals. When the kernel attempts to go to deep sleep the unused portals prevent it from doing so Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-03mx6: Add board mx6memcal for use in validating DDREric Nelson
This is a virtual "board" that uses configuration files and Kconfig to define the memory layout used by a real board during the board bring-up process. It generates an SPL image that can be loaded using imx_usb or SB_LOADER.exe. When run, it will generate a set of calibration constants for use in either or both a DCD configuration file for boards that use u-boot.imx or struct mx6_mmdc_calibration for boards that boot via SPL. In essence, it is a configurable, open-source variant of the Freescale ddr-stress tool. https://community.nxp.com/docs/DOC-105652 File mx6memcal_defconfig configures the board for use with mx6sabresd or mx6qsabreauto. Signed-off-by: Eric Nelson <eric@nelint.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-29Merge git://git.denx.de/u-boot-imxTom Rini
2017-12-29mx6slevk: imximage.cfg: Handle the CONFIG_SECURE_BOOT caseBreno Lima
Secure boot is not enabled in mx6slevk imximage.cfg, add support for it. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2017-12-29mx6sxsabresd: Load the correct dtb for revA boardFabio Estevam
Currently only imx6sx-sdb.dtb is loaded, but if revA board is used the correct dtb is imx6sx-sdb-reva.dtb, so make this possible. While at it, remove an extra 'mmc dev'. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-29imx: Add a common way for detecting NXP boards revisionFabio Estevam
NXP development boards based on i.MX6/i.MX7 contain the board revision information stored in the fuses. Introduce a common function that can be shared by different boards and convert mx6sabreauto to use this new mechanism. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2017-12-24boards: ls1046ardb: disable unavailable "ethernet" node in dtsPrabhakar Kushwaha
Linux device tree contains "ethernet" node for all possible interface supported by SoC i.e. LS1046A. It is not necessary for a SerDes protocol to support all possible interface. So disable unavailable "ethernet" node in device tree. Also, enable FDT_SEQ_MACADDR_FROM_ENV to fetch MAC address sequentially from environment variables Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: support hwconfig for eSDHC1 enablingYangbo Lu
I2C reading for DIP switch setting is not reliable for LS1012ARDB RevD and later versions. This patch is to add hwconfig support to enable/disable eSDHC1 manually for these boards. Also drop 'status' fix-up for eSDHC0 and leave it as it is. It shouldn't always be fixed up with 'okay'. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: add more board version informationYangbo Lu
Add LS1012ARDB RevC/RevC1/RevC2/RevD/RevE information and detect it when u-boot starts up. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14armv8: ls1012ardb: clean up definitions for I2C IO expandersYangbo Lu
This patch is to clean up definitions for I2C IO expanders. The value 0x10 of __SW_BOOT_EMU is wrong. It should be 0x2. Fixed it in this patch. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-14board/ls2080a, ls1088a: Add check for mc-dpl applied in fdtYogesh Gaur
Function fdt_fixup_board_enet() performs fdt fixup. Only return fdt_status_okay() when both MC is applied and DPL is deployed, else return fdt_status_fail(). This check is added to LS1088A/LS2080A/LS2088A boards. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-13armv8: ls1088ardb: support force SDHC mode by hwconfigYangbo Lu
The BRDCFG5[SPISDHC] register field of Qixis device is used to control SPI and SDHC signal routing. 10 = Force SDHC Mode - SPI_CS[0] is routed to CPLD for SDHC_VS use. - SPI_CS[1] is unused. - SPI_CS[2:3] are routed to the TDMRiser slot. 11 = Force eMMC Mode - SPI_CS[0:3] are routed to the eMMC card. 0X = Auto Mode - If SDHC_CS_B=0 (SDHC card installed): Use SDHC mode described above. - Else SDHC_CS_B=1 (no SDHC card installed): Use eMMC mode described above. In default the hardware uses auto mode, but sometimes we need to use force SDHC mode to support SD card hotplug, or SD sleep waking up in kernel. This patch is to support force SDHC mode by hwconfig. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-08Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2017-12-06armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.Udit Agarwal
Add the secure boot defconfigs for QSPI boot on LS1088ARDB and LS1088AQDS platforms. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: LS1088A_QSPI: SECURE_BOOT: Images validationUdit Agarwal
Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC phase using esbc_validate command. Enable validation of boot.scr script prior to its execution dependent on "secureboot" flag in environment Add header address for PPA to be validated during ESBC phase for LS1088A platform based on LAyerscape Chasis 3. Moves sec_init prior to ppa_init as for validation of PPA sec must be initialised before the PPA is initialised. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06armv8: ls1088: Add fsl_fdt_fixup_flashAshish Kumar
IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts if QSPI is enabled and vice-versa Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-12-06powerpc: mpc85xx: Fix static TLB table for SDRAMYork Sun
Most predefined TLB tables don't have memory coherence bit set for SDRAM. This wasn't an issue before invalidate_dcache_range() function was enabled. Without the coherence bit, dcache invalidation doesn't automatically flush the cache. The coherence bit is already set when dynamic TLB table is used. For some boards with different SPL boot method, or with legacy fixed setting, this bit needs to be set in TLB files. Signed-off-by: York Sun <york.sun@nxp.com>
2017-11-15armv8: ls1088aqds: Add SD boot support for ls1088qdsAshish Kumar
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>