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2017-11-10sunxi: SATA link timeout fixWerner Böllmann
After updating u-boot from v2016.01 to 2017.09, issue with "SATA link 0 timeout." on my Cubietruck board. mdelay milled after moving satapwr code to board. "sunxi: Turn satapwr on from board_init" (sha1: 9fbb0c3aa49f4604b0342cb527a6bd099f92eaeb) After adding the "mdelay(500);" line that was lost in the path the error is gone. Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de> [Rebased and updated change and commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-06MAINTAINERS: Add missing boards and config entriesTom Rini
As part of my usual round of build testing, output about missing MAINTAINERS information was not logged, and thus often overlooked. Correct that mistake by ensuring that I log the output of genboardscfg.py every time. As part of that, address a number of missing MAINTAINERS entires. In the case of a missing file, I have put the original submitter down. In the rest of the cases I have added the config (and sometimes relevant header file) to the existing set of file globs. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-03sunxi: only init USB Ethernet gadget when it's enabledIcenowy Zheng
If the USB Ethernet gadget is not yet enabled, the call of usb_ether_init in board/sunxi/board.c will lead to undefined reference error when building. Fix this problem. Fixes: 50ddbf1199a0 ("sunxi: Register usb_ether") Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-03sun7i: a20: Add Bananapi M1 Plus supportJagan Teki
Banana Pi M1 Plus is an open-source single-board computer that adds more connectivity to the classic board using Allwinner A20 SOC. Bananapi M1-Plus features: - A20 Dual-core 1.0GHz - 1 GB DDR3 SDRAM - MicroSD - 10/100/1000 Ethernet RJ45 - WiFi b/g/n - 5V DC Micro USB power-supply For dts file, Sync with Linux commit f92ca09("Merge branch 'akpm/master'"). Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-10-03sunxi: Remove the MMC index hackMaxime Ripard
The current code, if there's both an eMMC and an MMC slot available on the board, will swap the MMC indices based on whether we booted from the eMMC or the MMC. This way, the MMC we're supposed to boot on will always have the index 0. However, this causes various issues, for example when using other components that base their behaviour on the MMC index, such as fastboot. Let's remove that hack, and take the opposite approach. The MMC will always have the same index, but the bootcmd will pick the same device than the one we booted from. This is done through the introduction of the mmc_bootdev environment variable that will be filled by the board code based on the boot device informations we can get from the SoC. In order to not introduce regressions, we also need to adjust the fastboot MMC device and the environment device in order to set it to the eMMC, over the MMC, like it used to be the case. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-03sunxi: Use sunxi_get_boot_deviceMaxime Ripard
Our current board code duplicates a bit the sunxi_get_boot_device logic. Now that we can use that function in the full-flavoured U-Boot, remove that duplication and call the function instead. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-03sunxi: Register usb_etherMaxime Ripard
Call the function to register the usb_ether gadget in the board. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-03musb: sunxi: switch to the device modelMaxime Ripard
The device model was implemented so far using a hook that needed to be called from the board support, without DT support and only for the host. Switch to probing both in peripheral and host mode through the DT. Reviewed-by: Łukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-09-01sunxi: Fix CONFIG_SUNXI_GMAC referencesDave Prue
SUNXI_GMAC was still used to configure the code where as the same has been renamed and moved to Kconfig in below commit "sunxi: Move SUNXI_GMAC to Kconfig" (sha1: 4d43d065db3262f9a9918ba72457bf36dfb8e0bb) Signed-off-by: Dave Prue <dave@prue.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Tested-by: Mark Kettenis <kettenis@openbsd.org> [Tweek commit message, config_whitelist.txt, build-whitelist.sh] Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-08-16Merge git://git.denx.de/u-boot-sunxiTom Rini
Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass
We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename eth_setenv_enetaddr() to eth_env_set_enetaddr()Simon Glass
Rename this function for consistency with env_set(). Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename common functions related to setenv()Simon Glass
We are now using an env_ prefix for environment functions. Rename these commonly used functions, for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-16env: Rename setenv() to env_set()Simon Glass
We are now using an env_ prefix for environment functions. Rename setenv() for consistency. Also add function comments in common.h. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-15sun50i: a64: Add A64-OLinuXino initial supportJagan Teki
OLimex A64-OLinuXino is an open-source hardware board using the Allwinner A64 SOC. OLimex A64-OLinuXino has - A64 Quad-core Cortex-A53 64bit - 1GB or 2GB RAM DDR3L @ 672Mhz - microSD slot and 4/8/16GB eMMC - Debug TTL UART - HDMI - LCD - IR receiver - 5V DC power supply Tested-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-15sun50i: a64: Add initial NanoPi A64 supportJagan Teki
NanoPi A64 is a new board of high performance with low cost designed by FriendlyElec., using the Allwinner A64 SOC. Nanopi A64 features - Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS - 1GB DDR3 RAM - MicroSD - Gigabit Ethernet (RTL8211E) - Wi-Fi 802.11b/g/n - IR receiver - Audio In/Out - Video In/Out - Serial Debug Port - microUSB 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-11sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMCOlliver Schinagl
This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash storage. https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ It is a assembly variant of the regular Lime2 but featuring eMMC for storage. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-01dm: sata: sunxi: Add support for driver modelSimon Glass
Adjust SATA setup to support driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01dm: sunxi: sata: Don't build sata support into SPLSimon Glass
This is not used in SPL so we do not need to compile it. Make this change before adding driver-model support to the driver, to avoid build errors. With driver model we define a U_BOOT_DRIVER() which would otherwise be present in SPL and not be garbage-collected when building. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14sun50i: h5: Add initial NanoPi NEO2 supportJagan Teki
NanoPi NEO2 is designed and developed by FriendlyElec using the Allwinner 64-bit H5 SOC. NanoPi Neo2 key features - Allwinner H5, Quad-core 64-bit Cortex-A53 - 512MB DDR3 RAM - microSD slot - 10/100/1000M Ethernet - Serial Debug Port - 5V 2A DC MicroUSB power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-14sun50i: a64: Add initial Orangepi Win/WinPlus supportJagan Teki
Orangepi Win/WinPlus is an open-source single-board computer using the Allwinner A64 SOC. A64 Orangepi Win/WinPlus has - A64 Quad-core Cortex-A53 64bit - 1GB(Win)/2GB(Win Plus) DDR3 SDRAM - Debug TTL UART - Four USB 2.0 - HDMI - LCD - Audio and MIC - Wifi + BT - IR receiver - 5V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-14sun50i: h5: Add initial Orangepi Zero Plus 2 supportJagan Teki
Orangepi Zero Plus 2 is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Zero Plus 2 has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG+power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sunxi: add a defconfig for SoPine w/ official baseboardIcenowy Zheng
The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card detect pin of the MicroSD slot is broken, however, it doesn't matter as the design of SoPine didn't allow hot-swapping the MicroSD card (The MicroSD slot is at the back of the SoM, and when the SoM is installed on the baseboard, it's nearly impossible to remove the MicroSD). The official baseboard of it is a board with nearly the same connectors with the original Pine64+, with the MicroUSB power jack replaced, and at the position of MicroSD slot a eMMC module slot is added. Add support for SoPine with the official baseboard by adding its defconfig file. It still uses the device tree of Pine64, however, it will change after a proper device tree of SoPine with baseboard is accepted by Linux mainline. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [Update board/sunxi/MAINTAINERS] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-08sun8i: h3: Add initial NanoPi M1 Plus supportJagan Teki
NanoPi M1 Plus is designed and developed by FriendlyElec for professionals, enterprise users, makers and hobbyists using the Allwinner H3 SOC. NanoPi M1 Plus key features - Allwinner H3, Quad-core Cortex-A7@1.2GHz - 1GB DDR3 RAM - 8GB eMMC - microSD slot - 10/100/1000M Ethernet - Serial Debug Port - 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2017-06-05arm: Include asm/setup.h explictlySimon Glass
Include this header where needed so we do not need to rely on common.h. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-02sun50i: h5: Add initial Orangepi Prime supportJagan Teki
Orangepi Prime is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Prime has - Quad-core Cortex-A53 - 2GB DDR3 - Debug TTL UART - 1000M/100M Ethernet RJ45 - Three USB 2.0 - HDMI - Audio and MIC - Wifi + BT - IR receiver - HDMI - Wifi + BT Boot from MMC: ------------- U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000) NOTICE: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):aa75c8d NOTICE: BL3-1: Built : 18:28:27, May 24 2017 INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9 U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology CPU: Allwinner H5 (SUN50I) Model: OrangePi Prime DRAM: 2 GiB MMC: SUNXI SD/MMC: 0 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: phy interface7 eth0: ethernet@1c30000 starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-01sun50i: a64: Add initial Banana Pi M64 supportJagan Teki
BPI-M64 is a 64-bit quad-core mini single board computer using the Allwinner A64 SOC. BPI-M64 features - 1.2 Ghz Quad-Core ARM Cortex A53 - 2GB DDR3 SDRAM with 733MHz - MicroSD/eMMC(8GB) - 10/100/1000Mbps ethernet (Realtek RTL8211E/D) - Wifi + BT - IR receiver - Audio In/Out - Video In/Out - 5V 2A DC power-supply For dts file, Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'"). Boot from MMC: ------------- U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000) NOTICE: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):aa75c8d NOTICE: BL3-1: Built : 18:28:27, May 24 2017 NOTICE: Configuring AXP PMIC NOTICE: PMIC: setup successful INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9 U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology CPU: Allwinner A64 (SUN50I) Model: BananaPi-M64 DRAM: 2 GiB MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. starting USB... No controllers found Hit any key to stop autoboot: 0 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-30sunxi: Add support for NanoPi M1Mylene JOSSERAND
NanoPi M1 is a board based on Allwinner H3 CPU. This commit adds the support for this platform with: - an include device tree which enables UART, LEDs, GPIO key switch, 1 USB host ports and the SD-card as a dtsi file. - a device tree specific to this board that enables the 2 additional USB ports - a defconfig file for minimal support - a section in MAINTAINERS (add myself) Synchronized with the kernel device tree, from commits: sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2017-05-22mksunxi_fit_atf.sh: Allow for this to complete when bl31.bin is missingTom Rini
In situations like an autobuilder we are likely to not have bl31.bin present and thus would fail to build and propagate the error upwards. Instead, print a big warning to stderr so that human will see that something is wrong but complete the build. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-17sunxi: Move maintainership for Pine64Andre Przywara
After speaking to Hans at FOSDEM, he is fine with transferring the maintainership of the Pine64 boards over to me. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-17sunxi: update Pine64 READMEAndre Przywara
With the DRAM init code and the SPL's ability to load the ATF binary as well, we can now officially get rid of the boot0 boot method, which involed a closed-source proprietary blob to be used. Rework the Pine64 README file to document how to build the firmware. Also since these instructions now cover more boards, rename the file to README.sunxi64 to reflect this. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-17sunxi: use SPL header DT name for FIT board matchingAndre Przywara
Now that we can store a DT name in the SPL header, use this string (if available) when finding the right DT blob to load for U-Boot proper. This allows a generic U-Boot (proper) image to be combined with a bunch of supported DTs, with just the SPL (possibly only that string) to be different. Eventually this string can be written after the build process by some firmware update tool. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-17sunxi: 64-bit SoCs: introduce FIT generator scriptAndre Przywara
Now that the Makefile can call a generator script to build a more advanced FIT image, let's use this feature to address the needs of Allwinner boards with 64-bit SoCs (A64 and H5). The (DTB stripped) U-Boot binary and the ATF are static, but we allow an arbitrary number of supported device trees to be passed. The script enters both a DT entry in the /images node and the respective subnode in /configurations to support all listed DTBs. The location of the bl31.bin image from the ARM Trusted Firmware build can either by specified via the BL31 environment variable. If this is not set, the script looks for bl31.bin in U-Boot's build directory (which could be a symlink as well). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-17sunxi: SPL: add FIT config selector for Pine64 boardsAndre Przywara
For a board or platform to support FIT loading in the SPL, it has to provide a board_fit_config_name_match() routine, which helps to select one of possibly multiple DTBs contained in a FIT image. Provide a simple function which chooses the DT name U-Boot was configured with. If the DT name is one of the two Pine64 versions, determine the exact model by checking the DRAM size. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
2017-05-17sunxi: SPL: store RAM size in gdAndre Przywara
The sunxi SPL was holding the detected RAM size in some local variable only, so it wasn't accessible for other functions. Store the value in gd->ram_size instead, so it can be used later on. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-05-15mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMCMasahiro Yamada
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig. We do not need two options for the same feature. Deprecate the former. This commit was generated with the sed script 's/GENERIC_MMC/MMC/' and manual fixup of drivers/mmc/Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-04sunxi: add support for Banana Pi M2 Plus boardIcenowy Zheng
Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has already mainline device tree file that have landed into U-Boot source tree. Add a defconfig file for it and add the MAINTAINERS items. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-02ARM: sunxi: move board/sunxi/Kconfig to arch/arm/mach-sunxi/KconfigMasahiro Yamada
For the consistent location of SoC-level Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: video: Add A64/H3/H5 HDMI driverJernej Skrabec
This commit adds support for HDMI output. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: Enable DM_I2C for A64/H3/H5Jernej Skrabec
This commits enable DM I2C support for A64/H3/H5 SoCs. It is not enabled globaly for all sunxi SoCs, because some boards use PMICs which are connected through I2C. In order to keep same functionality, PMIC drivers needs to be ported to DM too. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: i2c: Add support for DM I2CJernej Skrabec
This commit adds support for DM I2C on sunxi platform. It can coexist with old style sunxi I2C driver, because it is still used in SPL and by some SoCs. Because sunxi platform doesn't yet support DM clk, reset and pinctrl driver, workaround is needed to enable clocks and set resets and pinctrls. This is done by calling i2c_init_board() in board_init(). This means that CONFIG_I2Cx_ENABLE options needs to be correctly set in order to use needed I2C controller. Commit is based on the previous patch made by Philipp Tomsich Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-28sunxi: Move function for later convenienceJernej Skrabec
This commit only moves i2c_init_board() function almost to the top and doesn't have any functional changes. This is needed for a temporary workaround in next commit when support for DM I2C will be introduced. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21sunxi: add support for Lichee Pi ZeroIcenowy Zheng
Lichee Pi Zero is a development board with a V3s SoC, which features 64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not soldered in production batch), a 40-pin RGB LCD connector and some extra pins available as 2.54mm pins or stamp holes. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21sunxi: add basic V3s supportIcenowy Zheng
Basic U-Boot support is now present for V3s. Some memory addresses are changed specially for V3s, as the original address map cannot fit into a so small DRAM. As the DRAM controller code needs a big refactor, the SPL support is disabled in this version. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add clock support for DE2/HDMI/TCON on newer SoCsJernej Skrabec
This is needed for HDMI, which will be added later. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add support for Bananapi M2 UltraChen-Yu Tsai
The Bananapi M2 Ultra is the first publicly available development board featuring the R40 SoC. This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra, as well as a defconfig for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add PSCI support for R40Chen-Yu Tsai
The R40's CPU controls are a combination of sun6i and sun7i. All controls are in the CPUCFG block, and it seems the R40 does not have a PRCM block. The core reset, power gating and clamp controls are grouped like sun6i. Last, the R40 does not have a secure SRAM block. This patch adds a PSCI implementation for CPU bring-up and hotplug for the R40. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Enable SPL for R40Chen-Yu Tsai
Now that we can do DRAM initialization for the R40, we can enable SPL support for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Provide defaults for R40 DRAM settingsChen-Yu Tsai
These values were taken from the Banana Pi M2 Ultra fex file found in the released vendor BSP. This is the only publicly available R40 device at the time of this writing. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-20sunxi: Add mmc[1-3] pinmux settings for R40Chen-Yu Tsai
The PIO is generally compatible with the A20, except that it routes the full 8 bits and eMMC reset pins for mmc2. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
generated by cgit (git 2.34.1) at 2024-12-27 11:36:11 +0000