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2018-11-16bcm968580xref: add initial supportPhilippe Reynes
This add the initial support of the broadcom reference board bcm968580xref with a bcm6858 SoC. This board has 512 MB of ram, 256 MB of flash (nand), 2 usb port, 1 uart, 4 ethernet ports (LAN), 1 ethernet port (WAN). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-11-16Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dmTom Rini
- virtio implementation and supporting patches - DM_FLAG_PRE_RELOC fixes - regmap improvements - minor buildman and sandbox things
2018-11-14Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-11-14x86: qemu: Imply virtio PCI transport and device driversBin Meng
Add virtio drivers for QEMU x86 targets. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14arm: qemu: Enumerate virtio bus during early bootBin Meng
Currently devices on the virtio bus is not automatically enumerated, which means peripherals on the virtio bus are not discovered by their drivers. This uses board_init() to do the virtio enumeration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14arm: qemu: Add a Kconfig in the board directoryBin Meng
This adds a Kconfig file in the board directory, so that some board-specific options can be specified there. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14riscv: qemu: Include some useful commandsBin Meng
With the virtio net and blk drivers, we can do more stuff with some useful commands. Imply those in the board Kconfig. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14riscv: qemu: Enumerate virtio bus during early bootBin Meng
Currently devices on the virtio bus is not automatically enumerated, which means peripherals on the virtio bus are not discovered by their drivers. This uses board_init() to do the virtio enumeration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-14Merge branch 'next'Tom Rini
This brings in the u-boot-net PR from Joe.
2018-11-13board: allwinner: sun50i-h6: Add Orangepi Lite2 supportJagan Teki
OrangePi Lite2 is Allwinner H6 based open-source SBC, which support: - Allwinner H6 Quad-core 64-bit ARM Cortex-A53 - GPU Mali-T720 - 1GB LPDDR3 RAM - AXP805 PMIC - AP6356S Wifi/BT - USB 2.0, USB 3.0 Host, OTG - HDMI port - 5V/2A DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-11-13sun50i: A64: add support for R_I2C controllerVasily Khoruzhick
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C. Add support for this I2C controller and the pinmux which doesn't conflict with RSB. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Tested-by: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Vagrant Cascadian <vagrant@debian.org> Acked-by: Jagan Teki <jagan@openedev.com>
2018-11-09MAINTAINERS: Update stm32mp entryPatrick Delaunay
Add mailing list for stm32mp architecture and board. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-06mx8mq_evk: README: Delete file introduced by mistakeFabio Estevam
board/freescale/mx8mq_evk/README has been introduced by mistake in commit d0dd73974c61 ("imx: add i.MX8QXP MEK board support") Remove it for now as this should be introduced when mx8mq_evk support is in place. Reported-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-11-05drivers: net: keystone_net: drop non dm codeGrygorii Strashko
Networking support for all TI K2 boards converted to use DM model and CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop unused non DM K2 networking code. Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-11-01iot_dk: Add READMEAlexey Brodkin
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01emdk->emsdp: Rename boardAlexey Brodkin
Real marketing name of the board was recently updated so to accommodate that change renaming the board and all related to it. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-31sunxi: add support for Banana Pi M2 Zero boardJun Nie
Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit 512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one powering-only) and a miniHDMI port. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> [jagan: Fixed board MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-29Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini
2018-10-29sunxi: store DRAM size in SPL headerAndre Przywara
At the moment we rely on the infamous get_ram_size() function to learn the actual DRAM size in U-Boot proper. This function has two issues: 1) It only works if the DRAM size is a power of two. We start to see boards which have 3GB of (usable) DRAM, so this does not fit anymore. 2) As U-Boot has no notion of reserved memory so far, it will happily ride through the DRAM, possibly stepping on secure-only memory. This could be a region of DRAM reserved for OP-TEE or some other secure payload, for instance. It will most likely crash in that case. As the SPL DRAM init routine has very accurate knowledge of the actual DRAM size, lets propagate this wisdom to U-Boot proper. We re-purpose a currently reserved word in our SPL header for that. The SPL itself stores the detected DRAM size there, and bumps the SPL header version number in that case. U-Boot proper checks for a valid SPL header and a high enough version number, then uses the DRAM size from there. If the SPL header field is not sufficient, we fall back to the old DRAM scanning routine. Part of the DRAM might be present and probed by SPL, but not accessible by the CPU. They're restricted in the main U-Boot binary, when accessing the DRAM size from SPL header. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: board.c: refactor SPL header checksAndre Przywara
So far we have two users which want to look at the SPL header. We will get more in the future. Refactor the existing SPL header checks into a common function, to simplify reusing the code. Now that this is easy, add proper version checks to the DT name parsing. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: Extend SPL header versioningAndre Przywara
On Allwinner SoCs we use some free bytes at the beginning of the SPL image to store various information. We have a version byte to allow updates, but changing this always requires all tools to be updated as well. Introduce the concept of semantic versioning [1] to the SPL header: The major part of the version number only changes on incompatible updates, a minor number bump indicates backward compatibility. This patch just documents the major/minor split, adds some comments to the header file and uses the versioning information for the existing users. [1] https://semver.org Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-29sunxi: disable Pine A64 model detection code on other boardsIcenowy Zheng
The Pine A64 Plus/non-Plus model detection code is now built on all 64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in use. Disable them when the board is Pine A64 by adding a Kconfig option that is only selected on Pine A64. On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and saves a 104 byte strstr() function, then makes SPL on H6 succeed to build. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-25Merge tag 'u-boot-imx-20181025' of git://git.denx.de/u-boot-imxTom Rini
Merged imx8 architecture, fix build for imx8 + warnings
2018-10-24sunxi: docs: Mention CONFIG_NAND requirementPriit Laes
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24sunxi: Fix typos of spelling AllwinnerPriit Laes
Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-24warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfigFabio Estevam
Add an entry for the warp7_bl33_defconfig target. This fixes the following warnings: WARNING: no status info for 'warp7_bl33' WARNING: no maintainers for 'warp7_bl33' Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
2018-10-23ARM: Samsung: Add Exynos5422-based Odroid HC2 supportDirk Meul
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1. The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used for the Odroid HC2. Resend because MUA changed whitespace. Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2018-10-22ARM: omap3_logic: Add NOR Flash Support for SOM-LVAdam Ford
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR flash part connected to CS2 in addition to the NAND part on CS0. This patch setups the GPMC timings for the MT28 NOR Flash and enables the CFI-Flash driver now that the CFI stuff is in Kconfig Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22board: at91sam9x5: add environment var for cpu typeEugen Hristev
When booting and CPU is detected from cpuid, we also need an environment variable that will be used in boot commands to load the proper devicetree. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-10-22ARM: omap3logic: Fix MMC nameAdam Ford
In my haste to migrate SPL to DM, I copied the wrong name. While it really doesn't matter, I'd prefer the name to match the board, so am335x_mmc0 is now called omap3_logic_mmc0 Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3logic: Specify DM serial driver as omap_serialAdam Ford
With the new omap_serial driver, this patch uses this instead from the former ns16550_serial driver. Even though the omap_serial driver is essentially the same. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3logic: Encapsulate the MUSB functions in check for DMAdam Ford
With the DM_USB working for USB host features, encapsulate the USB gadget initialization in a precomiler check. If DM is enabled, we don't need to manually initialize the MUSB driver. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22ARM: omap3_logic.c: Optimize DDR timings based on OMAP35 or 36/37Adam Ford
The default timings are assumming an OMAP36 / AM37 / DM37, but the OMAP35 controller is a bit slower, so DDR may operate out of spec when under stress. This patch checks the processor type and sets the DDR timings according to processor type. Fixes: 5ad4212ce0d5 ("ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo") Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-22board: ge: bx50v3: fix initialization of i2c bus0Dan Cimpoca
I2C bus 0 was not initialized correctly. There is an offset between i2c index and the structure number of pad info. So i2c bus 0 can be in an inconsistent state. This problem become visible on B{4,6}50v3 with the CPUC HW watchdog enabled. Sometimes when the CPUC HW watchdog interrupted the boot process, U-Boot was not able to read VPD from I2C/EEPROM and the system failed to boot up again, because a device connected to that bus was stuck in data transfer state (from previous boot attempt) and there was no method to recover (struct mxc_i2c_bus::idle_bus_fn was not set) courtesy of incorrect initialization. Signed-off-by: Dan Cimpoca <dan.I.cimpoca@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: b{4,6}50v3 modelineIan Ray
The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise the LVDS panel shows garbage. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: correct LDB clockIan Ray
Use Video PLL to provide 65MHz for all displays. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22board: ge: bx50v3: Change maintainerFabien Lahoudere
While using ./scripts/get_maintainer.pl I detect that the Maintainer name and address for bx50v3 boards are not valid. The new maintainer for GE bx50v3 products must be Ian Ray. Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
2018-10-22imx: imx8qxp_mek: update to build image in U-BootPeng Fan
Update README Add imximage.cfg Update defconfig to include imximage.cfg Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-22imx: add i.MX8QXP MEK board supportPeng Fan
Add i.MX8QXP MEK board support Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver. Added README file. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-10-19arm: lpc32xx: add CONFIG_ARCH_LPC32XX build optionVladimir Zapolskiy
The explicit arch specific build symbol allows to group supported boards, generalize common config options and it will serve as a dependency for platform only drivers. Two related board defconfigs are resynced after the change. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-10-18ARM: rmobile: Fix module clock controls refer status on Gen3Hiroyuki Yokoyama
When referring to the MSTPSR register, it contains the clock status of SYS, RT, SECURE, and controlling SMSTPCR using this value has the problem of being affected by the RT and SECURE status.This patch changes the reference register to SMSTPCR. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3Hiroyuki Yokoyama
Tidy up unused definition related to power control of 3DG. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: salvator-x: Remove GSX clock force supplyHiroyuki Yokoyama
GSX clock force supply code is unnecessary at U-Boot, because GSX clock control is supported at the kernel driver. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Remove Watchdog and CPG settings on Gen3Hiroyuki Yokoyama
This code is unnecessary, because these registers are set by the initial program loader (IPL). Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Remove TMU0/TMU1 settings on Gen3Hiroyuki Yokoyama
U-Boot uses ARM generic timer, TMU0 and TMU1 are not used, remove them. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3Hiroyuki Yokoyama
This patch fixes the write-protect control of CPG. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-16arm64: zynqmp: Add new command for TCM initializationSiva Durga Prasad Paladugu
This patch adds new zynqmp command "zynqmp tcminit mode" to initialize TCM. TCM needs to be initialized before accessing to avoid ECC errors. This new command helps to perform the same. It also makes tcm_init() as global and uses it for doing the TCM initialization. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: versal: Add support for new Xilinx Versal ACAPsMichal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: zynq: Add support for DLC20 boardMichal Simek
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: mx5: Add M53Menlo boardMarek Vasut
Add Menlosystems M53 board, based on the M53 SoM. This board has Ethernet, USB host, USB gadget, UART and LCD on it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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