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2013-02-20SMDK5250: Add PMIC voltage settingsRajeshwari Shinde
This patch adds required pmic voltage settings for SMDK5250. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-02-19ARM: atmel: add at91sam9g20ek_2mmc nand boot supportBo Shen
Add at91sam9g20_2mmc nand boot support. on this board, there is no dataflash, so disable it change one commet for at91sam9g20ek board Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-02-18omap3: mvblx: pass FPGA version to the kernelMichael Jones
Extract FPGA version from the .rbf and pass this info to the kernel. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2013-02-18omap3: mvblx: select fpgafilename according to orientationMichael Jones
Rather than load the FPGA file from the FAT partition, look at entry in system EEPROM to decide which file to retrieve directly from the EXT3 partition. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
2013-02-18OMAP3: igep00x0: Add new IGEP COM PROTON.Enric Balletbo i Serra
The IGEP COM PROTON is a new ultra compact module design with an on-board ethernet controller. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2013-02-18OMAP3: igep00x0: use official board names.Enric Balletbo i Serra
This trivial patch only changes current boards names for the official names. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2013-02-18am335x_evm: enable support for booting via USBIlya Yanok
This adds necessary config options and a new build target, am335x_evm_usbspl, to enable usb booting and fixes board_eth_init() function to take into account that we may have USB ether support in SPL now. This uses the same MAC for both cpsw and USB, in order to match ROM behavior. The usbspl build target does not contain UART SPL, CPSW SPL or extra environment settings, so that we may fit within our binary size constraint. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Signed-off-by: Tom Rini <trini@ti.com>
2013-02-18am33xx: pcm051: Remove wp pin mux for sd-cardLars Poeschel
The pcm051 does not have the wp pin connected to the sd-card socket. Therefore remove the pinmux for the pin. The was a carry-over from the am335x evm code. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
2013-02-18beagle: expansion boards: add LSR COM6L adapterrobertcnelson@gmail.com
http://www.lsr.com/wireless-products/com6l The eeprom on this expansion board requires 16bit addressing. Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2013-02-18beagle: expansion boards: retry i2c_read with 16bit addressingrobertcnelson@gmail.com
Some expansion boards now ship with at24 eeproms that need to communicate via 16bit addressing. Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
2013-02-15powerpc/83xx/km: drop uneeded dtt_bus environment varHolger Brunck
There is no need for a environment variable to configure the dtt bus. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km/scripts: replace hardcoded uImageAndreas Huber
Replace uImage with ${uimage}. If uimage is not set, default it to uImage. Signed-off-by: Andreas Huber <andreas.huber@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15powerpc/83xx/km: add MV88E6122 switch support for kmvect1Karlheinz Jerg
kmvect1 has a UEC2 connection to the piggy board and a UEC0 connection to the switch MV88E6122. This switch has a connection to a frontport ethernet interface. The ethernet port used for network booting is automatically selected by u-boot. If a Piggy is plugged, the Piggy port is selected (UEC2, eth1). If the Piggy isn't present, the Frontport is selected (UEC0, eth0). The switch reset is connected to a GPIO on the PRIO3 board FPGA (GPIO28) and released at startup. Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km/common/ivm: rework piggy mac adress offset generationHolger Brunck
For the the kmvect1 board we will also need a functionality to add an offset to the IVMs MAC address, because these board will have two valid ethernet ports for debugging purpose. So move the code to an own function. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km82xx, km83xx: move ethernet_present() from common to cpu specificKarlheinz Jerg
For kmvect1 we need a special solution and for km_arm boards we already have. So move the common code to the architectur specific file. Signed-off-by: Karlheinz Jerg <karlheinz.jerg@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km/common/ivm: remove CONFIG_SYS_I2C_IVM_BUS related codeHolger Brunck
This define isn't set within our setup files. So we can safely remove the affected code. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km/common/ivm: remove obsolete codeHolger Brunck
EEprom_ivm_addr isn't set in our environment, so remove the usage of this. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-15km/common: remove unneeded ifdefs for I2CHolger Brunck
All boards from this serie use i2c. There is no need to #ifdef the header. Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
2013-02-14x86: Remove eNET boardsSimon Glass
These are no longer used and should be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
2013-02-12am335x_evm: Fix CPSW ethernet on GP EVM and EVM-SKTom Rini
In commit cfd4ff6 we implemented part of advisory 1.0.10 (internal delay for RGMII mode not supported). This in turn however requires that we set the tx clock delay feature in the PHY itself. Signed-off-by: Tom Rini <trini@ti.com>
2013-02-12Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2013-02-12imx: mx6q DDR3 init: Benefit from available CL = 7Benoît Thébaudeau
All the users of mx6q_4x_mt41j128.cfg (DDR3-1333H Micron MT41J128M16HA-15E or SK hynix H5TQ2G63BFR-H9C for i.MX6Q SABRE Lite, and DDR3-1600K Micron MT41K128M16JT-125:K for i.MX6 SABRE SD) support the optional down binning to DDR3-1066F (CL = 7, CWL = 6), which is possible at 532 MHz, so use it. In these conditions: tRCD(min) = 13.125 ns tRP(min) = 13.125 ns tRC(min) = max(tRAS(min, DDR3-1333H), tRAS(min, DDR3-1600K)) + tRP(min) tRAS(min, DDR3-1333H) = 36 ns tRAS(min, DDR3-1600K) = 35 ns MMDC1_MDCFG0.tCL should be set to 7 nCK, encoded as 0x4 in the bit-field MMDC1_MDCFG0[3:0]. MR0.CL should be set as in MMDC1_MDCFG0.tCL, i.e. to 7 nCK, which is encoded as 0x6 in MRS.LMR.MR0.{A6:A4, A2} and MMDC1_MDSCR[22:20, 18]. MMDC1_MDCFG1.tCWL should be set to 6 nCK, encoded as 0x4 in the bit-field MMDC1_MDCFG1[2:0]. MMDC1_MDCFG1.tRCD should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded as 0x6 in the bit-field MMDC1_MDCFG1[31:29]. MMDC1_MDCFG1.tRP should be set to 13.125 ns, which is 7 nCK at 532 MHz, encoded as 0x6 in the bit-field MMDC1_MDCFG1[28:26]. MMDC1_MDCFG1.tRC should be set to 49.125 ns, which is 27 nCK at 532 MHz, encoded as 0x1A in the bit-field MMDC1_MDCFG1[25:21]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-02-12imx: mx6q DDR3 init: Fix MR0.PPDBenoît Thébaudeau
MR0.PPD should be set as in MMDCx_MDPDC.SLOW_PD, i.e. to fast-exit mode, which is encoded as 1 in MRS.LMR.MR0.A12 and MMDCx_MDSCR[28]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-02-12imx: mx6q DDR3 init: Fix RST_to_CKEBenoît Thébaudeau
MMDC1_MDOR.RST_to_CKE should be set to 500 µs according to the JEDEC specification for DDR3. With a cycle of 15.258 µs, this gives 33 cycles encoded as 0x23 for the bit-field MMDC1_MDOR[5:0]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-02-12imx: mx6q DDR3 init: Fix SDE_to_RSTBenoît Thébaudeau
MMDC1_MDOR.SDE_to_RST should be set to 200 µs according to the JEDEC specification for DDR3. With a cycle of 15.258 µs, this gives 14 cycles encoded as 0x10 for the bit-field MMDC1_MDOR[13:8]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-02-12imx: mx6q DDR3 init: Fix tXPRBenoît Thébaudeau
MMDC1_MDOR.tXPR should be set as specified for the JEDEC DDR3 timing tXPR. For all DDR3 speed bins: tXPR(min) = max(5 nCK, tRFC(min) + 10 ns) tRFC(2 Gb) = 160 ns All the users of mx6q_4x_mt41j128.cfg have a 2-Gb density (Micron MT41J128M16HA-15E or SK hynix H5TQ2G63BFR-H9C for i.MX6Q SABRE Lite, and Micron MT41K128M16JT-125:K for i.MX6 SABRE SD). Hence, MMDC1_MDOR.tXPR should be set to max(5 nCK, 170 ns), which is 170 ns and 91 nCK at 532 MHz, encoded as 0x5A in the bit-field MMDC1_MDOR[23:16]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-02-12imx: mx6q DDR3 init: Fix tMRDBenoît Thébaudeau
MMDC1_MDCFG1.tMRD should be set to max(tMRD, tMOD) for DDR3. For all DDR3 speed bins: tMRD(min) = 4 nCK tMOD(min) = max(12 nCK, 15 ns) Hence, MMDC1_MDCFG1.tMRD should be set to max(12 nCK, 15 ns), which is 12 nCK at 532 MHz, encoded as 0xB in the bit-field MMDC1_MDCFG1[8:5]. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-02-11Tegra114: Add/enable Dalmore build (T114 reference board)Tom Warren
This build is stripped down. It boots to the command prompt. GPIO is the only peripheral supported. Others TBD. Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11Tegra114: Add generic Tegra114 build supportTom Warren
This patch adds basic Tegra114 (T114) build support - no specific board is targeted. Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11Tegra114: Dalmore: Add DT filesTom Warren
These are stripped down for bringup, They'll be filled out later to match-up with the kernel DT contents, and/or as devices are brought up (mmc, usb, spi, etc.). Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11tegra: add SPI SLINK driverAllen Martin
Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11tegra30: fdt: add SPI SLINK nodesAllen Martin
Add tegra30 SPI SLINK nodes to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11tegra20: fdt: add SPI SFLASH nodeAllen Martin
Add node for tegra20 SPI SFLASH controller to fdt. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11tegra: fdt: add back missing host1x nodeAllen Martin
Add back host1x node to seaboard dts file. This got dropped during the tegra fdt sort. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-08Clean up libfdt.h includesGerald Van Baren
The libfdt.h file is the definition file for libfdt. It is unnecessary to include other fdt header files (the necessary ones are pulled in by libfdt.h). Signed-off-by: Gerald Van Baren <gvb@unssw.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
2013-02-07am33xx: Drop gpio0_7_pin_mux from phytec pcm051Tom Rini
This mux is not currently used and appears to be a carry-over from the am335x evm code. Acked-by: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
2013-02-07OMAP3: igep00x0: fix a build warning on IGEP boardsJavier Martinez Canillas
commit b689cd5 OMAP3: use a single board file for IGEP devices introduced the following build warning: igep00x0.h:168:24: warning: backslash-newline at end of file [enabled by default] This patch fixes the issue. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
2013-02-07Add DDR3 support for AM335x-EVM (Version 1.5A)Jeff Lance
AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the DDR3 chip. [Hebbar Gururaja <gururaja.hebbar@ti.com>] - Resolve merge conflict while rebasing. File structure is changed in the mainline. So re-arrange the code accordingly. - Update commit message to reflect the DDR3 part number Signed-off-by: Jeff Lance <j-lance1@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
2013-02-07am335x: display msg when reading MAC from efuseLars Poeschel
When ethaddr is not set in environment the MAC address is read from efuse. The message was only printed in debug case, but this message could be of interest for the ordinary user, so printf it. Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
2013-02-07pcm051: Add support for Phytec phyCORE-AM335xLars Poeschel
The board is named pcm051 and has this hardware: SOC: TI AM3359 DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB ETH 1: LAN8710AI SPI-Flash: W25Q64BVSSIG RTC: RV-4162-C7 I2C-EEPROM: CAT32WC32 NAND: MT29F4G08_VFPGA63 PMIC: TPS65910A3 LCD Supported: UART 1 MMC/SD ETH 1 USB I2C SPI Not yet supported: NAND RTC LCD Signed-off-by: Lars Poeschel <poeschel@lemonage.de> [trini: Add #define CONFIG_PHY_ADDR 0 to config] Signed-off-by: Tom Rini <trini@ti.com>
2013-02-07OMAP3: igep00x0: add boot status GPIO LEDJavier Martinez Canillas
This patch adds an GPIO LED boot status for IGEP boards. The GPIO LED used is the red LED0 while the Linux kernel uses the green LED0 as the boot status. By using different GPIO LEDs, the user can know in which step of the boot process the board currently is. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2013-02-07OMAP3: use a single board file for IGEP devicesJavier Martinez Canillas
Even when the IGEPv2 board and the IGEP Computer-on-Module are different from a form factor point of view, they are very similar in the fact that share many components and how they are wired. So, it is possible (and better) to have a single board file for both devices and just use the CONFIG_MACH_TYPE to make a differentiation between each board when needed. This change avoids code duplication by removing 298 lines of code and makes future maintenance easier. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2013-02-04Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini
2013-02-04board sc3: fix warning about nested commentJeroen Hofstee
cc: Heiko Schocher <hs@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2013-02-04ppc: Move kbd_status to arch_global_dataSimon Glass
Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04ppc: Move wdt_last to arch_global_dataSimon Glass
Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04ppc: Move fpga_state to arch_global_dataSimon Glass
Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04ppc: Move mirror_hack to arch_global_dataSimon Glass
Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04ppc: Move mpc5xxx clocks to arch_global_dataSimon Glass
Move ipb_clk and pci_clk into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04ppc: Move lbc_clk and cpu to arch_global_dataSimon Glass
Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Update for bsc9132qds.c, b4860qds.c] Signed-off-by: Tom Rini <trini@ti.com>
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