uboot-2021-rebase.git - uboot 2021 rebase, to fix booting on modern SD cards, from https://github.com/fifteenhex/u-boot/tree/am335x_som

Age	Commit message (Collapse)	Author
2010-04-13	ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU	Peter Tyser
	Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-10-18	rename CFG_ macros to CONFIG_SYS	Jean-Christophe PLAGNIOL-VILLARD
	Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-06-23	ppc4xx: Fix problem in gpio_config()	Stefan Roese
	As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted left by one. So the additional shift is bogus. Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-04	ppc4xx: Add functionality to GPIO support	Lawrence R. Johnson
	This patch makes two additions to GPIO support: First, it adds function gpio_read_in_bit() to read the a bit from the GPIO Input Register (GPIOx_IR) in the same way that function gpio_read_out_bit() reads a bit from the GPIO Output Register (GPIOx_OR). Second, it modifies function gpio_set_chip_configuration() to provide an additional option for configuring the GPIO from the "CFG_4xx_GPIO_TABLE". According to the 440EPx User's Manual, when an alternate output is used, the three-state control is configured in one of two ways, depending on the particular output. The first option is to select the corresponding alternate three-state control in the GPIOx_TRSH/L registers. The second option is to select the GPIO Three-State Control Register (GPIOx_TCR) in the GPIOx_TRSH/L registers, and set the corresponding bit in the GPIOx_TCR register to enable the output. For example, the Manual specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use the alternate three-state control (first option), and specifies configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output enabled in the GPIOx_TCR register (second option). Currently, gpio_set_chip_configuration() configures all alternate signal outputs to use the first option. This patch allow the second option to be selected by setting the "out_val" element in the table entry to "GPIO_OUT_1". The first option is used when the "out_val" element is set to "GPIO_OUT_0". Because "out_val" is not currently used when an alternate signal is selected, and because all current GPIO tables set "out_val" to "GPIO_OUT_0" for all alternate signals, this patch should not change any existing configurations. Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-11	ppc4xx: Correct GPIO offset in gpio_config()	Stefan Roese
	Thanks to Gary Jennejohn for pointing this out. Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-15	ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms	Stefan Roese
	- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE - Cleanup of the 4xx GPIO functions - Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-26	ppc4xx: Add support for AMCC 405EP Taihu board	John Otken
	Signed-off-by: John Otken <john@softadvances.com>
2007-07-20	ppc4xx: Fix bug with default GPIO output value	Stefan Roese
	As spotted by Matthias Fuchs, the default output values for all GPIO1 outputs were not setup correctly. This patch fixes this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15	[ppc4xx] Extend 44x GPIO setup with default output state	Stefan Roese
	The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup is extended with the default GPIO output state (level). Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-08	[PATCH] fix gpio setting when using CFG_440_GPIO_TABLE	Benoît Monin
	Set the correct value in GPIOx_TCR when configuring the gpio with CFG_440_GPIO_TABLE. Signed-off-by: Benoit Monin <bmonin@adeneo.eu> Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24	[PATCH] Clean up 40EZ/Acadia support	Stefan Roese
	This patch cleans up all the open issue of the preliminary Acadia support. Signed-off-by: Stefan Roese <sr@denx.de>