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2017-05-08ARM: DT: stm32f7: add sdram pin contol nodeVikas Manocha
Also added DT binding doc for stm32 fmc(flexible memory controller). Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
2017-04-14at91: video: DT binding for HLCDC driverSongjun Wu
DT binding documentation for atmel HLCDC driver. Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
2017-04-04rockchip: rk3399: spl: make SPL boot-order configurable via /chosenPhilipp Tomsich
The RK3399 does not have any boot selection pins and the BootROM probes the boot interfaces using the following boot-order: 1. SPI 2. eMMC (sdhci in DTS) 3. SD card (sdmmc in DTS) 4. USB loader For ease of deployment, the SPL stage should mirror the boot order of the ROM and use the same probing order (assuming that valid images can be detected by SPL) unless instructed otherwise. The boot-order can then be configured via the 'u-boot,spl-boot-order' property in the chosen-node of the DTS. While this approach is easily extensible to other boards, it is only implemented for the RK3399 for now, as the large SRAM on the RK3399 makes this easy to fit the needed infrastructure into SPL and our production setup already runs with DM, OF_CONTROL and BLK in SPL. The new boot-order property is expected to be used in conjunction with FIT images (and all legacy image formats disabled via Kconfig). A boot-sequence with probing and fallthroughs from SPI via eMMC to SD card (i.e. &spiflash, &sdhci, &sdmmc) has been validated on the RK3399-Q7. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-03-26drivers/net/phy: add fixed-phy / fixed-link supportHannes Schmelzer
This patch adds support for having a "fixed-link" to some other MAC (like some embedded switch-device). For this purpose we introduce a new phy-driver, called "Fixed PHY". Fixed PHY works only with CONFIG_DM_ETH enabled, since the fixed-link is described with a subnode below ethernet interface. Most ethernet drivers (unfortunately not all are following same scheme for searching/attaching phys) are calling "phy_connect(...)" for getting a phy-device. At this point we link in, we search here for a subnode called "fixed- link", once found we start phy_device_create(...) with the special phy- id PHY_FIXED_ID (0xa5a55a5a). During init the "Fixed PHY" driver has registered with this id and now gets probed, during probe we get all the details about fixed-link out of dts, later on the phy reports this values. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-03-24Merge git://git.denx.de/u-boot-arcTom Rini
This replaces legacy arch/arc/lib/timer.c implementation and allows us to describe ARC Timers in Device Tree. Among other things that way we may properly inherit Timer's clock from CPU's clock s they really run synchronously.
2017-03-24drivers: timer: Introduce ARC timer driverVlad Zakharov
This commit introduces timer driver for ARC. ARC timers are configured via ARC AUX registers so we use special functions to access timer control registers. This driver allows utilization of either timer0 or timer1 depending on which one is available in real hardware. Essentially only existing timers should be mentioned in board's Device Tree description. Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-23mvebu: usb: xhci: Add VBUS regulator supply to the host driverKonstantin Porotchkin
The USB device should linked to VBUS regulator through "vbus-supply" DTS property. This patch adds handling for "vbus-supply" property inside the USB device entry for turning on the VBUS regulator upon the host adapter probe. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
2017-03-23mvebu: pcie: Add support for GPIO reset for PCIe deviceKonstantin Porotchkin
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2017-03-20part_efi: document device-tree binding for part_efi configurationPhilipp Tomsich
This adds documentation on the u-boot,efi-partition-entries-offset property (which overrides CONFIG_EFI_PARTITION_ENTRIES_OFF, if present). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-20doc: move documentation for /config node into a separate filePhilipp Tomsich
This moves the description of the /config node from README.fdt-control into a separate file doc/device-tree-bindings/config.txt. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-17Merge git://git.denx.de/u-boot-rockchipTom Rini
This includes support for rk3188 from Heiko Stübner and and rk3328 from Kever Yang. Also included is SPL support for rk3399 and a fix for rk3288 to get it booting again (spl_early_init()).
2017-03-17PINCTRL: stm32f7: add pin control driverVikas Manocha
This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-17clk: stm32f7: add clock driver for stm32f7 familyVikas Manocha
add basic clock driver support for stm32f7 to enable clocks required by the peripherals. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-03-16rockchip: arm64: rk3399: add ddr controller driverKever Yang
RK3399 support DDR3, LPDDR3, DDR4 sdram, this patch is porting from coreboot, support 4GB lpddr3 in this version. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Added rockchip: tag: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-28ARM: DTS: stm32: add stm32f746-disco device tree filesMichael Kurz
This patch adds the DTS source files needed for stm32f746-disco board The files are based on the stm32f429/469 files from current linux kernel. Source for "arch/arm/dts/armv7-m.dtsi": Linux: "arch/arm/boot/dts/armv7-m.dtsi" Signed-off-by: Michael Kurz <michi.kurz@gmail.com> Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
2016-12-27regulator: fixed: Add support to handle enable-active-high DT propertyVignesh R
Add support to handle enable-active-high DT property. This property is used to drive the gpio controlling fixed regulator as active high when claiming gpio line. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-12-12arm64: mvebu: Add pin control nodes to A8K family DTS filesKonstantin Porotchkin
Add pin control nodes to APN806, CP-master, CP-slave and Armada-7040 and Armada-8040 boards DTS files Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2016-12-12arm64: mvebu: pinctrl: Add pin control driver for A8K familyKonstantin Porotchkin
Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2016-11-28serial: pl01x: expose skip_init platdata option in DTFabian Vogt
To be able to represent the skip-init platdata element with OF_CONTROL, it needs to be read from the device tree as well and put into the platform data. Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28serial: bcm283x_mu: add device tree supportFabian Vogt
This patch adds device tree support for the bcm283x mini-uart driver. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-28gpio: bcm2835: add device tree supportFabian Vogt
This patch adds device tree support for the bcm2835 GPIO driver. Signed-off-by: Fabian Vogt <fvogt@suse.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-11-18sf: Rename sf_params.c to spi_flash_ids.cJagan Teki
Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2016-11-07dt: net: add DWC EQoS bindingStephen Warren
The Synopsys DWC EQoS is a configurable Ethernet MAC/DMA IP block which supports multiple options for bus type, clocking and reset structure, and feature list. This patch imports the binding from the Linux kernel, including my V3 patch to extend the binding to cover the Tegra186, which is applied for next-20160912. So far, my changes have been acked by Lars Persson, the original author of the binding. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-10-07power: pmic: add Ricoh RN5T567 PMIC supportStefan Agner
Add device model enabled PMIC driver for Ricoh RN5T567 PMIC used on Colibri iMX7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-07dm: imx: serial: support device treeStefan Agner
Support instatiation through device tree. Also parse the fsl,dte-mode property to determine whether DTE mode shall be used. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-06regulator: fixed: obey startup delayJohn Keeping
When enabling a fixed regulator, it may take some time to rise to the correct voltage. If we do not delay here then subsequent operations will fail. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-15atmel: Bring in at91 pio4 device tree file and bindingsWenyou Yang
Bring in required device tree file and bindings from Linux. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-15i2c: atmel: DT binding for i2c driverSongjun Wu
DT binding documentation for atmel i2c driver. Signed-off-by: Songjun Wu <songjun.wu@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2016-08-08gpio: Add driver for TI PCF8575 I2C GPIO expanderVignesh R
TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a 16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. The I/Os should be high before being used as inputs. Read the device documentation for more details[1]. This driver is based on pcf857x driver available in Linux v4.7 kernel. It supports basic reading and writing of gpio pins. [1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-08-04dt-bindings: add Tegra186 BPMP I2C bindingStephen Warren
In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-04dt-bindings: allow child nodes inside the Tegra BPMPStephen Warren
The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-04ARM: tegra: add BPMP DT bindingsStephen Warren
The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-08-04ARM: tegra: adapt to latest HSP DT bindingStephen Warren
The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-09serial_sh: Add standrad SCI (w/o FIFO) supportYoshinori Sato
Add support for standard type SCI (without FIFO) port. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-07-09serial_sh: Device Tree supportYoshinori Sato
Add Device Tree bindings. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-06-19Add a reset driver framework/uclassStephen Warren
A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips. This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two. The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-06-12x86: Update x86-pinctrl driver device-tree-bindings docBin Meng
This updates the device-tree-bindings doc for x86-pinctrl driver: - clarify "gpio-offset" is required only when "mode-gpio" is set - correct property name "pull-strength" - use tab instead of space at several places Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-31gpio: add Tegra186 GPIO driverStephen Warren
Tegra186's GPIO controller register layout is significantly different from previous chips, so add a new driver for it. In fact, there are two different GPIO controllers in Tegra186 that share a similar register layout, but very different port mapping. This driver covers both. The DT binding is already present in the Linux kernel (in linux-next via the Tegra tree so far). Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # v1 Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-26Add a mailbox driver framework/uclassStephen Warren
A mailbox is a hardware mechanism for transferring small message and/or notifications between the CPU on which U-Boot runs and some other device such as an auxilliary CPU running firmware or a hardware module. This patch defines a standard API that connects mailbox clients to mailbox providers (drivers). Initially, DT is the only supported method for connecting the two. The DT binding specification (mailbox.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-05-24Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/zynq_gem.c
2016-05-24net: phy: dp83867: Add device tree bindings and documentationDan Murphy
Add the device tree bindings and the accompanying documentation for the TI DP83867 Giga bit ethernet phy driver. The original document was from: [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2016-05-23Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini
2016-05-23x86: irq: Enable SCI on IRQ9Bin Meng
By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2016-05-21drivers: spi: add spi support for QCA/Atheros ath79 SOCsWills Wang
This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21drivers: serial: add serial driver for ar933x SOCWills Wang
This patch add support for ar933x serial. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-04-13i2c: Describe Cadence I2C devicetree bindingsMoritz Fischer
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-06armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun
LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2016-04-01gpio: Add support for Qualcomm PM8916 gpiosMateusz Kulikowski
This driver supports GPIOs present on PM8916 PMIC. There are 2 device drivers inside: - GPIO driver (4 "generic" GPIOs) - Keypad driver that presents itself as GPIO with 2 inputs (power and reset) Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01pmic: Add support for Qualcomm PM8916 PMICMateusz Kulikowski
This PMIC is connected on SPMI bus so needs SPMI support enabled. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2016-04-01drivers: spmi: Add support for Qualcomm SPMI bus driverMateusz Kulikowski
Support SPMI arbiter on Qualcomm Snapdragon devices. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2024-12-26 23:35:07 +0000