summaryrefslogtreecommitdiff
path: root/drivers/clk/rockchip/clk_rk3288.c
AgeCommit message (Expand)Author
2017-11-21rockchip: clock: update sysreset driver bindingKever Yang
2017-10-01rockchip: clk: Add SARADC clock support for rk3288David Wu
2017-08-13rockchip: clk: remove RATE_TO_DIVKever Yang
2017-08-13rockchip: clk: update dwmmc clock divKever Yang
2017-06-09rockchip: Init clocks again when chain-loadingSimon Glass
2017-06-09rockchip: rk3288: Convert clock driver to use shifted masksSimon Glass
2017-06-01dm: Rename dev_addr..() functionsSimon Glass
2017-05-10rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIOXu Ziyuan
2017-03-16rockchip: clk: rk3288: limit gpll and cpll init to SPL buildHeiko Stübner
2016-11-25rockchip: clk: Support setting ACLKSimon Glass
2016-10-30rockchip: rk3288: Move rockchip_get_cru() out of the driverSimon Glass
2016-09-22clk: rk3288: add PWM clock get rateKever Yang
2016-08-05rockchip: remove log2 reimplementation from clock driversHeiko Stübner
2016-08-05move: rockchip: move clock drivers into a subdirectoryHeiko Stübner