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path: root/drivers/ddr/fsl/ctrl_regs.c
AgeCommit message (Expand)Author
2014-12-15driver/ddr/fsl: Fix MRC_CYC calculation for DDR3York Sun
2014-12-05driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slotsYork Sun
2014-11-23linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada
2014-09-25driver/ddr/fsl: Fix DDR4 driverYork Sun
2014-09-25driver/ddr/fsl: Fix tXP and tCKEYork Sun
2014-09-08driver/ddr/fsl: Add support of overriding chip select write levelingYork Sun
2014-09-08driver/ddr/freescale: Add support of accumulate ECCYork Sun
2014-07-22driver/ddr: Fix DDR register timing_cfg_8York Sun
2014-06-05powerpc/mpc85xx: Add workaround for DDR erratum A004508York Sun
2014-04-22drivers/ddr: Fix possible out of bounds errorYork Sun
2014-04-22driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun
2014-02-21driver/ddr: Add 256 byte interleaving supportYork Sun
2014-02-21driver/ddr: Change Freescale ARM DDR driver to support both big and little en...York Sun
2013-11-25powerpc/mpc8xxx: Extend DDR registers' fieldsYork Sun
2013-11-25Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xxYork Sun
2013-11-25Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun