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path: root/drivers/ddr/fsl/ddr4_dimm_params.c
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2018-01-30drivers/ddr/fsl: Cleanup unused variableYork Sun
Variable "row_density" is no longer used. Drop it from DIMM structure. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Add calculation of register control wordsYork Sun
DDR4 RDIMM has some information in SPD to be used to calculate the control words for register chip. The rest can be found from JEDEC spec DDR4RCD02. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Add 3DS RDIMM supportYork Sun
On top of RDIMM support, add new register calculation to support 3DS RDIMMs. Only symmetrical 3DS is supported at this time. Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30drivers/ddr/fsl: Fix DDR4 RDIMM supportYork Sun
For DDR4, command/address delay in mode registers and parity latency in timing config register are only needed for UDIMMs, but not RDIMMs. Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix calculation of timing config registers. Use hexadecimal format for printing RCW (register control word) registers. Signed-off-by: York Sun <york.sun@nxp.com>
2015-04-23driver/ddr/fsl: Fix driver to support empty first slotYork Sun
CS0 was not allowed to be empty by u-boot driver in the past to simplify the driver. This may be inconvenient for some debugging. This patch lifts the restrictions. Controller interleaving still requires CS0 populated. Signed-off-by: York Sun <yorksun@freescale.com>
2015-02-24driver/ddr/fsl: Add support for multiple DDR clocksYork Sun
Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator. Signed-off-by: York Sun <yorksun@freescale.com>
2014-12-05driver/ddr/fsl: Add workaround for faulty SPDYork Sun
Some UDIMMs have faulty SPD with wrong mapping for DQ[36-39]. Using raw card spec in case this error is detected. Signed-off-by: York Sun <yorksun@freescale.com>
2014-09-25driver/ddr: Restruct driver to allow standalone memory spaceYork Sun
U-boot has been initializing DDR for the main memory. The presumption is the memory stays as a big continuous block, either linear or interleaved. This change is to support putting some DDR controllers to separated space without counting into main memory. The standalone memory controller could use different number of DIMM slots. Signed-off-by: York Sun <yorksun@freescale.com>
2014-04-22driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>