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path: root/drivers/ddr
AgeCommit message (Expand)Author
2015-08-08ddr: altera: Clean up scc_mgr_set_oct_out1_delay()Marek Vasut
2015-08-08ddr: altera: Clean up scc_set_bypass_mode()Marek Vasut
2015-08-08ddr: altera: Clean up scc_mgr_load_dqs_for_write_group()Marek Vasut
2015-08-08ddr: altera: Implement universal scc_mgr_set_all_ranks()Marek Vasut
2015-08-08ddr: altera: Shuffle around scc_mgr_set_*all_ranks()Marek Vasut
2015-08-08ddr: altera: Clean up scc_mgr_initialize()Marek Vasut
2015-08-08ddr: altera: Implement universal scc manager config functionMarek Vasut
2015-08-08ddr: altera: Reorder scc manager functionsMarek Vasut
2015-08-08ddr: altera: Clean up scc manager function argsMarek Vasut
2015-08-08ddr: altera: Clean up reg_file_set*()Marek Vasut
2015-08-08ddr: altera: Clean up initialize_hps_phy()Marek Vasut
2015-08-08ddr: altera: Clean up initialize_reg_file()Marek Vasut
2015-08-08ddr: altera: Clean up hc_initialize_rom_data()Marek Vasut
2015-08-08ddr: altera: Massage addr into I/O accessorsMarek Vasut
2015-08-08ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directlyMarek Vasut
2015-08-08ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESSMarek Vasut
2015-08-08ddr: altera: Pluck out remaining sdr_get_addr() callsMarek Vasut
2015-08-08ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*)Marek Vasut
2015-08-08ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*)Marek Vasut
2015-08-08ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*)Marek Vasut
2015-08-08ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*)Marek Vasut
2015-08-08ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)"Marek Vasut
2015-08-08ddr: altera: Clean up ugly casts in sdram_calibration_full()Marek Vasut
2015-08-08ddr: altera: Minor indent fix in set_rank_and_odt_mask()Marek Vasut
2015-08-08ddr: altera: Fix debug message format in sequencerMarek Vasut
2015-08-08ddr: altera: Fix typo in mp_threshold1 programmingMarek Vasut
2015-08-08ddr: altera: Move struct sdram_prot_rule prototypeMarek Vasut
2015-08-08arm: socfpga: Move sdram_config.h to board dirMarek Vasut
2015-08-08driver/ddr/altera: Add the sdram calibration portionDinh Nguyen
2015-08-08driver/ddr/altera: Add DDR driver for Altera's SDRAM controllerDinh Nguyen
2015-08-03drivers/ddr/fsl: Adjust bstopre valueYork Sun
2015-07-23arm: mvebu: a38x: Use correct PEX register access macrosStefan Roese
2015-07-23arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdrStefan Roese
2015-07-23arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directoryStefan Roese
2015-07-20driver/ddr/fsl: Add a hook to update SPD addressYork Sun
2015-05-05arm: mvebu: db-mv784mp-gp: Fix ECC I2C addressStefan Roese
2015-04-23driver/ddr/fsl: Add workaround for DDR erratum A008511York Sun
2015-04-23driver/ddr/fsl: Add built-in memory test for DDR4 driverYork Sun
2015-04-23driver/ddr/fsl: Fix driver to support empty first slotYork Sun
2015-04-23drivers/ddr/fsl: Update DDR driver for DDR4York Sun
2015-04-20MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT registerCurt Brune
2015-02-24driver/ddr/fsl: Add sync of refreshYork Sun
2015-02-24driver/ddr/fsl: Fix a typo in timing_cfg_8 calculationYork Sun
2015-02-24driver/ddr/fsl: Add support for multiple DDR clocksYork Sun
2015-02-24driver/ddr/fsl: Add workround for erratumn A008514York Sun
2015-02-24driver/ddr/fsl: Add workaround for A008336York Sun
2015-02-24driver/ddr/fsl: Adjust CAS to preamble override for emulatorYork Sun
2015-02-06arm: mvebu: drivers/ddr: Add DDR3 driver with training code from Marvell bin_hdrStefan Roese
2015-01-23arm/ls1021a: Add workaround for DDR erratum A008378York Sun
2014-12-15driver/ddr/fsl: Fix MRC_CYC calculation for DDR3York Sun